Ð þíW-8Rp(½R8 ,HSG H7022hsg,h702allwinner,sun5i-a13chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0 c$, jdisabledaliasesq/soc@01c00000/serial@01c28400memoryymemory…cpuscpu@0ycpu2arm,cortex-a8…c‰¹°0—a€\À ꀙp /Ö …€O€ÊO€—€O€¨·ÉÛæ:ì:clocks=dummyô 2fixed-clockæìclk@01c20050ô2allwinner,sun4i-a10-osc-clk…ÂPn6osc24Mæìosc3M_clk2fixed-factor-clockô$.cosc3Mæ ì clk@0ô 2fixed-clock€osc32kæ ì clk@01c20000ô2allwinner,sun4i-a10-pll1-clk…Âcpll1æ ì clk@01c20008ô2allwinner,sun5i-a13-pll2-clk…Âc pll2-1xpll2-2xpll2-4xpll2-8xæìclk@01c20010ô2allwinner,sun4i-a10-pll3-clk…Âc pll3æ ì pll3x2_clk32allwinner,sun4i-a10-pll3-2x-clkfixed-factor-clockô$.c pll3-2xæìclk@01c20018ô2allwinner,sun4i-a10-pll1-clk…Âcpll4clk@01c20020ô2allwinner,sun4i-a10-pll5-clk… cpll5_ddrpll5_otheræìclk@01c20028ô2allwinner,sun4i-a10-pll6-clk…Â(cpll6_satapll6_otherpll6æìclk@01c20030ô2allwinner,sun4i-a10-pll3-clk…Â0c pll7æ ì pll7x2_clk2fixed-factor-clockô$.c pll7-2xæìcpu@01c20054ô2allwinner,sun4i-a10-cpu-clk…ÂTc  cpuæìaxi@01c20054ô2allwinner,sun4i-a10-axi-clk…ÂTcaxiæìahb@01c20054ô2allwinner,sun5i-a13-ahb-clk…ÂTcahb9Iæìapb0@01c20054ô2allwinner,sun4i-a10-apb0-clk…ÂTcapb0æìclk@01c20058ô2allwinner,sun4i-a10-apb1-clk…ÂXc apb1æìclk@01c2005cô"2allwinner,sun4i-a10-axi-gates-clk…Â\c` axi_dramclk@01c20080ô2allwinner,sun4i-a10-mod0-clk…€cnandclk@01c20084ô2allwinner,sun4i-a10-mod0-clk…„cmsclk@01c20088ô2allwinner,sun4i-a10-mmc-clk…ˆcmmc0mmc0_outputmmc0_sampleæìclk@01c2008cô2allwinner,sun4i-a10-mmc-clk…ÂŒcmmc1mmc1_outputmmc1_sampleæ ì clk@01c20090ô2allwinner,sun4i-a10-mmc-clk…Â�cmmc2mmc2_outputmmc2_sampleæ!ì!clk@01c20098ô2allwinner,sun4i-a10-mod0-clk…˜ctsclk@01c2009cô2allwinner,sun4i-a10-mod0-clk…œcssclk@01c200a0ô2allwinner,sun4i-a10-mod0-clk… cspi0æìclk@01c200a4ô2allwinner,sun4i-a10-mod0-clk…¤cspi1æìclk@01c200a8ô2allwinner,sun4i-a10-mod0-clk…¨cspi2æ)ì)clk@01c200b0ô2allwinner,sun4i-a10-mod0-clk…°cir0clk@01c200ccôn2allwinner,sun5i-a13-usb-clk…ÂÌcusb_ohci0usb_phyæ$ì$clk@01c20140ô2allwinner,sun4i-a10-codec-clk…Â@ccodecæ,ì,clk@01c2015cô2allwinner,sun5i-a13-mbus-clk…Â\cmbusclk@01c20060ô"2allwinner,sun5i-a13-ahb-gates-clk…Â`c\`  "$(,.34Ðahb_usbotgahb_ehciahb_ohciahb_ssahb_dmaahb_bistahb_mmc0ahb_mmc1ahb_mmc2ahb_nandahb_sdramahb_spi0ahb_spi1ahb_spi2ahb_stimerahb_veahb_tveahb_lcdahb_csiahb_de_beahb_de_feahb_iepahb_mali400æìclk@01c20068ô#2allwinner,sun5i-a13-apb0-gates-clk…Âhc `apb0_codecapb0_pioapb0_iræ*ì*clk@01c2006cô#2allwinner,sun5i-a13-apb1-gates-clk…Âlc`4apb1_i2c0apb1_i2c1apb1_i2c2apb1_uart1apb1_uart3æ-ì-clk@01c20100ôA2allwinner,sun5i-a13-dram-gates-clkallwinner,sun4i-a10-gates-clk…Âc`9dram_vedram_csidram_de_fedram_de_bedram_acedram_iepæìclk@01c20104ôn 2allwinner,sun4i-a10-display-clk…Âc de-beæìclk@01c2010côn 2allwinner,sun4i-a10-display-clk… c de-feæ4ì4clk@01c20118ôn!2allwinner,sun4i-a10-tcon-ch0-clk…Âc tcon-ch0-sclkæìclk@01c2012cô!2allwinner,sun4i-a10-tcon-ch1-clk…Â,c tcon-ch1-sclkæ2ì2soc@01c00000 2simple-bus=sram-controller@01c00000$2allwinner,sun4i-a10-sram-controller…À0=sram@00000000 2mmio-sram…À =Àsram@00010000 2mmio-sram… =sram-section@00002allwinner,sun4i-a10-sram-d…jokayæ#ì#dma-controller@01c020002allwinner,sun4i-a10-dma…À {c†æìspi@01c050002allwinner,sun4i-a10-spi…ÀP{  c‘ahbmod�¢rxtx jdisabledspi@01c060002allwinner,sun4i-a10-spi…À`{  c‘ahbmod� ¢rxtx jdisabledmmc@01c0f0002allwinner,sun5i-a13-mmc…Àð c‘ahbmmcoutputsample{ jokay¬defaultºÄÐÚãmmc@01c100002allwinner,sun5i-a13-mmc…Á c  ‘ahbmmcoutputsample{! jdisabledmmc@01c110002allwinner,sun5i-a13-mmc…Á c !!!‘ahbmmcoutputsample{" jdisabledusb@01c130002allwinner,sun4i-a10-musb…Á0c{&ïmcÿ"usb"#jokay$otgphy@01c13400,2allwinner,sun5i-a13-usb-phy…Á4ÁH7phy_ctrlpmu1c$‘usb_phyA$$Husb0_resetusb1_resetjokay¬defaultº%&Tfz'‹(æ"ì"usb@01c14000&2allwinner,sun5i-a13-ehcigeneric-ehci…Á@{'cÿ"usbjokayusb@01c14400&2allwinner,sun5i-a13-ohcigeneric-ohci…ÁD{(c$ÿ"usbjokayspi@01c170002allwinner,sun4i-a10-spi…Áp{  c)‘ahbmod�¢rxtx jdisabledinterrupt-controller@01c204002allwinner,sun4i-a10-ic…œ±æìpinctrl@01c20800…Â{c*œ±Ò2allwinner,sun5i-a13-pinctrlæìi2c0@0ÞPB0PB1íi2c0æ/ì/i2c1@0 ÞPB15PB16íi2c1æ0ì0i2c2@0 ÞPB17PB18íi2c2æ1ì1mmc0@0ÞPF0PF1PF2PF3PF4PF5ímmc0æìmmc2@0.ÞPC6PC7PC8PC9PC10PC11PC12PC13PC14PC15ímmc2uart3@0 ÞPG9PG10íuart3uart3-cts-rts@0 ÞPG11PG12íuart3pwm0ÞPB2ípwmlcd_rgb666@0hÞPD2PD3PD4PD5PD6PD7PD10PD11PD12PD13PD14PD15PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27ílcd0uart1@0 ÞPE10PE11íuart1uart1@1ÞPG3PG4íuart1æ.ì.ahci_pwr_pin@0ÞPB8 ígpio_outæ<ì<usb0_vbus_pin@0ÞPG12 ígpio_outæ=ì=usb1_vbus_pin@0ÞPH6 ígpio_outæ>ì>usb2_vbus_pin@0ÞPH3 ígpio_outæ?ì?mmc0_cd_pin@0ÞPG0ígpio_inæìusb0_id_detect_pin@0ÞPG2ígpio_inæ%ì%usb0_vbus_detect_pin@0ÞPG1ígpio_inæ&ì&timer@01c20c002allwinner,sun4i-a10-timer… �{cwatchdog@01c20c902allwinner,sun4i-a10-wdt… �lradc@01c228002allwinner,sun4i-a10-lradc-keys…Â({jokay+button@200 +Volume Up1s<D @button@400 +Volume Down1r<D€codec@01c22c00L2allwinner,sun4i-a10-codec…Â,@{ c*, ‘apbcodec�¢rxtx jdisabledeeprom@01c238002allwinner,sun4i-a10-sid…Â8rtp@01c250002allwinner,sun5i-a13-ts…ÂP{]æ8ì8serial@01c284002snps,dw-apb-uart…„{s}c-jokay¬defaultº.serial@01c28c002snps,dw-apb-uart…ÂŒ{s}c- jdisabledi2c@01c2ac002allwinner,sun4i-a10-i2c…¬{c-jokay¬defaultº/pmic@34…4{2x-powers,axp209œ±gpio2x-powers,axp209-gpioÂÒregulatorsŠÜdcdc2�vdd-cpu¬ÀB@Øã`æìdcdc3 �vdd-int-dll¬ÀB@Ø\Àldo1¬ÀÖ ØÖ �vdd-rtcldo2�avcc¬À-ÆÀØ-ÆÀæ+ì+ldo3 �vcc-wifiÀ2Z Ø2Z æ(ì(ldo4�ldo4ldo5�ldo5 jdisabledusb_power_supply!2x-powers,axp202-usb-power-supply jdisabledi2c@01c2b0002allwinner,sun4i-a10-i2c…°{c-jokay¬defaultº0rtc@51 2nxp,pcf8563…Qi2c@01c2b4002allwinner,sun4i-a10-i2c…´{ c-jokay¬defaultº1timer@01c600002allwinner,sun5i-a13-hstimer…Æ{RSclcd-controller@01c0c0002allwinner,sun5i-a13-tcon…ÀÀ{,AHlcdc$2‘ahbtcon-ch0tcon-ch1tcon-pixel-clock jdisabledportsport@0…endpoint@0…ð3æ7ì7port@1…pwm@01c20e002allwinner,sun5i-a13-pwm… c jdisableddisplay-frontend@01e00000%2allwinner,sun5i-a13-display-frontend…à{/c.4 ‘ahbmodramA4 jdisabledæ;ì;portsport@1…endpoint@0…ð5æ6ì6display-backend@01e60000$2allwinner,sun5i-a13-display-backend…æc, ‘ahbmodramA jdisabled9 á£portsport@0…endpoint@0…ð6æ5ì5port@1…endpoint@0…ð7æ3ì3thermal-zonescpu_thermal ú6èD8cooling-mapsmap0T9 Y:ÿÿÿÿÿÿÿÿtripscpu_alert0hLtЀpassiveæ9ì9cpu_crith† tÐ €criticaldisplay-engine#2allwinner,sun5i-a13-display-engine;ahci-5v2regulator-fixed¬defaultº<�ahci-5vÀLK@ØLK@“¥¸ jdisabledusb0-vbus2regulator-fixed¬defaultº= �usb0-vbusÀLK@ØLK@¥¸ jokayæ'ì'usb1-vbus2regulator-fixed¬defaultº> �usb1-vbusÀLK@ØLK@“¥¸ jdisabledusb2-vbus2regulator-fixed¬defaultº? �usb2-vbusÀLK@ØLK@“¥¸ jdisabledvcc3v02regulator-fixed�vcc3v0À-ÆÀØ-ÆÀvcc3v32regulator-fixed�vcc3v3À2Z Ø2Z æìvcc5v02regulator-fixed�vcc5v0ÀLK@ØLK@ #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusserial0device_typeregclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levelcpu-supplylinux,phandle#clock-cellsclock-frequencyclock-output-namesclock-divclock-multassigned-clocksassigned-clock-parentsclock-indices#reset-cellsinterrupts#dma-cellsclock-namesdmasdma-namespinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertedinterrupt-namesphysphy-namesextconallwinner,sramdr_mode#phy-cellsreg-namesresetsreset-namesusb0_id_det-gpiosusb0_vbus_det-gpiosusb0_vbus-supplyusb1_vbus-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pullvref-supplylabellinux,codechannelvoltage#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltremote-endpoint#pwm-cellsassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisallwinner,pipelinesregulator-boot-onenable-active-highgpio