Ð þí¨ù8� ( Y�h¯google,veyron-jerry-rev7google,veyron-jerry-rev6google,veyron-jerry-rev5google,veyron-jerry-rev4google,veyron-jerry-rev3google,veyron-jerrygoogle,veyronrockchip,rk3288& 7Google Jerrychosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000…/serial@ff190000�/serial@ff690000•/serial@ff1b0000�/serial@ff1c0000¥/spi@ff110000ª/spi@ff120000¯/spi@ff130000´/spi@ff110000/ec@0/i2c-tunnelmemoryºmemoryÆ€arm-pmuarm,cortex-a12-pmu0Ê—˜™šÕcpusèrockchip,rk3066-smpöcpu@500ºcpuarm,cortex-a12Æh w@\À@™p‰@Ö @Л@O€O€Èàa€� s€B@ žÀ~ð 'À » 9À » KÀ » ì0 » *œ@8?KQcpu@501ºcpuarm,cortex-a12ÆKQcpu@502ºcpuarm,cortex-a12ÆKQcpu@503ºcpuarm,cortex-a12ÆKQamba simple-busYdma-controller@ff250000arm,pl330arm,primecellÆÿ%@Ê`k8 †apb_pclkKQdma-controller@ff600000arm,pl330arm,primecellÆÿ`@Ê`k8Á †apb_pclk ’disableddma-controller@ffb20000arm,pl330arm,primecellÆÿ²@Ê`k8Á †apb_pclkKQQQreserved-memoryYdma-unusable@fe000000Æþoscillator fixed-clock™n6©xin24m¼K Q timerarm,armv7-timerÉ0Ê   ™n6timer@ff810000rockchip,rk3288-timerÆÿ�  ÊH 8 a †timerpclkdisplay-subsystemrockchip,display-subsystemí dwmmc@ff0c0000rockchip,rk3288-dw-mshcó€ðÑ€ 8ÈDrv†biuciuciu-driveciu-sample Ê Æÿ @’okay->È P YZw�Ž›¨¶ ÂÏÚdefaultèdwmmc@ff0d0000rockchip,rk3288-dw-mshcó€ðÑ€ 8ÉEsw†biuciuciu-driveciu-sample Ê!Æÿ @’okay-òÿ wÚdefault è�Ž›¨¶Âdwmmc@ff0e0000rockchip,rk3288-dw-mshcó€ðÑ€ 8ÊFtx†biuciuciu-driveciu-sample Ê"Æÿ@ ’disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcó€ðÑ€ 8ËGuy†biuciuciu-driveciu-sample Ê#Æÿ@’okayYžÏ. wÚdefault èsaradc@ff100000rockchip,saradcÆÿ Ê$=8I[†saradcapb_pclkW Osaradc-apb ’disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8AR†spiclkapb_pclk[  `txrx Ê,Údefaultè !"Æÿ’okayec@0google,cros-ec-spiÆj& ÊÚdefaultè#‡-ÆÀi2c-tunnelgoogle,cros-ec-i2c-tunnel™sbs-battery@bsbs,sbs-batteryÆ «¿keyboard-controllergoogle,cros-ec-keybÔä ÷@};0DY1 d>"A#( C  \=@V B |)<?  · + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BS†spiclkapb_pclk[ `txrx Ê-Údefaultè$%&'Æÿ ’disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CT†spiclkapb_pclk[`txrx Ê.Údefaultè()*+Æÿ’okay flash@0jedec,spi-nor‡úð€Æi2c@ff140000rockchip,rk3288-i2cÆÿ Ê>†i2c8MÚdefaultè,’okay™€12Idtpm@20infineon,slb9645ttÆ `i2c@ff150000rockchip,rk3288-i2cÆÿ Ê?†i2c8OÚdefaultè- ’disabledi2c@ff160000rockchip,rk3288-i2cÆÿ Ê@†i2c8PÚdefaultè./’okay™€12I,ts3a227e@3b ti,ts3a227eÆ;&0ÊÚdefaultè1xK‚Q‚trackpad@15elan,ekth3000Æ& ʃ2Žtrackpad@2c hid-over-i2c& ÊÆ,œ ƒ2Ži2c@ff170000rockchip,rk3288-i2cÆÿ ÊA†i2c8QÚdefaultè3’okay™† 1,IèKdQdserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uartÆÿ Ê7«µ8MU†baudclkapb_pclkÚdefault è456’okayÂMÒÜlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uartÆÿ Ê8«µ8NV†baudclkapb_pclkÚdefaultè7’okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uartÆÿi Ê9«µ8OW†baudclkapb_pclkÚdefaultè8’okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uartÆÿ Ê:«µ8PX†baudclkapb_pclkÚdefaultè9 ’disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uartÆÿ Ê;«µ8QY†baudclkapb_pclkÚdefaultè: ’disabledthermal-zonesreserve_thermalçèýˆ ;cpu_thermalçdýˆ ;tripscpu_alert0p'ÐÁpassiveK<Q<cpu_alert1$ø'ÐÁpassiveK=Q=cpu_crit_�'Ð Ácriticalcooling-mapsmap02< 7ÿÿÿÿmap12= 7ÿÿÿÿÿÿÿÿgpu_thermalçdýˆ ;tripsgpu_alert0p'ÐÁpassiveK>Q>gpu_crit_�'Ð Ácriticalcooling-mapsmap02> 7ÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3288-tsadcÆÿ( Ê%8HZ†tsadcapb_pclkŸ Otsadc-apbÚinitdefaultsleepè?F@P?Zps’okay‡žK;Q;ethernet@ff290000rockchip,rk3288-gmacÆÿ)ʹmacirqeth_wake_irqÉA88—fgc˜Ä]M†stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Ostmmaceth ’disabledusb@ff500000 generic-ehciÆÿP Ê8†usbhostÖBÛusb’okayåusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2ÆÿT Ê8ÆotgûhostÖC Ûusb2-phy’okayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2ÆÿX Ê8Á†otgûhost$€€@@ 3ÖD Ûusb2-phy’okayÂz=Dusb@ff5c0000 generic-ehciÆÿ\ Ê8Ćusbhost ’disabledi2c@ff650000rockchip,rk3288-i2cÆÿe Ê<†i2c8LÚdefaultèE’okay™€12Idpmic@1brockchip,rk808Æ©xin32kwifibt_32kin&0ÊÚdefaultèFT޼u��™¥G±½ÉÖ2ãðGüGKvQvregulatorsDCDC_REG1 vdd_arm,> q°V nqKQregulator-state-memƒDCDC_REG2 vdd_gpu,> 5VÐnqregulator-state-memœ´B@DCDC_REG3  vcc135_ddr,regulator-state-memœDCDC_REG4 vcc_18,>w@Vw@KQregulator-state-memœ´w@LDO_REG1  vcc33_io,>2Z V2Z K2Q2regulator-state-memœ´2Z LDO_REG3 vdd_10,>B@VB@regulator-state-memœ´B@LDO_REG7 vdd10_lcd_pwren_h,>&% V&% regulator-state-memƒSWITCH_REG1  vcc33_lcd,KOQOregulator-state-memƒLDO_REG6  vcc18_codec,>w@Vw@KPQPregulator-state-memƒLDO_REG4  vccio_sd>w@V2Z KQregulator-state-memƒLDO_REG5  vcc33_sd>2Z V2Z K Q regulator-state-memƒLDO_REG8  vcc33_ccd,>2Z V2Z regulator-state-memœ´2Z LDO_REG2 mic_vcc,>w@Vw@regulator-state-memƒi2c@ff660000rockchip,rk3288-i2cÆÿf Ê=†i2c8NÚdefaultèH’okay™† 12I max98090@10maxim,max98090Æ&Iʆmclk8qÚdefaultèJK�Q�pwm@ff680000rockchip,rk3288-pwmÆÿhÐÚdefaultèK8^†pwm’okayK„Q„pwm@ff680010rockchip,rk3288-pwmÆÿhÐÚdefaultèL8^†pwm’okaypwm@ff680020rockchip,rk3288-pwmÆÿh ÐÚdefaultèM8^†pwm ’disabledpwm@ff680030rockchip,rk3288-pwmÆÿh0ÐÚdefaultèN8^†pwm ’disabledbus_intmem@ff700000 mmio-sramÆÿp€ Yÿp€smp-sram@0rockchip,rk3066-smp-sramÆsram@ff720000#rockchip,rk3288-pmu-srammmio-sramÆÿrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdÆÿsKQpower-controller!rockchip,rk3288-power-controllerÛÂh= KTQTpd_vio@9Æ È8ÊÍÈÌÅÆ¾¿ÔÕÖÙÑÒchgfdehilkjpd_hevc@11Æ 8Ïoppd_video@12Æ 8ÐÜpd_gpu@13Æ 8Àreboot-modesyscon-reboot-modeï”öRBÃRBÃRBà  RBÃsyscon@ff740000rockchip,rk3288-sgrfsysconÆÿtclock-controller@ff760000rockchip,rk3288-cruÆÿvÉA¼,HÂÑÝjÒÞk$Ò#g¸€ׄÍeá£ðÑ€xhÀá£ðÑ€xhÀKQsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdÆÿwKAQAedp-phyrockchip,rk3288-dp-phy8h†24m9’okayK_Q_io-domains"rockchip,rk3288-io-voltage-domain’okayD2NYg2w2…O‘�Pªusbphyrockchip,rk3288-usb-phy’okayusb-phy@3209Æ 8]†phyclk¼KDQDusb-phy@3349Æ48^†phyclk¼KBQBusb-phy@3489ÆH8_†phyclk¼KCQCwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdtÆÿ€8p ÊO’okaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifÆÿ‹¸ †hclkmclk8ÐT[Q`tx Ê6ÚdefaultèRÉA ’disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sÆÿ‰ Ê5[QQ`txrx†i2s_hclki2s_clk8ÎRÚdefaultèSÉä’okayK€Q€cypto-controller@ff8a0000rockchip,rk3288-cryptoÆÿŠ@ Ê0 8ÇÍ}Á†aclkhclksclkapb_pclk® Ocrypto-rst’okayvop@ff930000rockchip,rk3288-vopÆÿ“œ Ê8žцaclk_vopdclk_vophclk_vopþT def Oaxiahbdclk U’okayportK Q endpoint@0Æ VKeQeendpoint@1Æ WKaQaendpoint@2Æ XK]Q]iommu@ff930300rockchip,iommuÆÿ“ Ê ¹vopb_mmuþT  #’okayKUQUvop@ff940000rockchip,rk3288-vopÆÿ”œ Ê8ƿ҆aclk_vopdclk_vophclk_vopþT °±² Oaxiahbdclk Y’okayportK Q endpoint@0Æ ZKfQfendpoint@1Æ [KbQbendpoint@2Æ \K^Q^iommu@ff940300rockchip,iommuÆÿ” Ê ¹vopl_mmuþT  #’okayKYQYmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsiÆÿ–@ Ê8~d †refpclkþT ÉA ’disabledportsportendpoint@0Æ ]KXQXendpoint@1Æ ^K\Q\dp@ff970000rockchip,rk3288-dpÆÿ—@ Êb8ic†dppclkÖ_ÛdpoOdpÉA’okayÚdefaultè`portsport@0Æendpoint@0Æ aKWQWendpoint@1Æ bK[Q[port@1ÆendpointÆ cK‰Q‰hdmi@ff980000rockchip,rk3288-dw-hdmiÆÿ˜µÉA Êg8hm †iahbisfrþT ’okay 0dportsportendpoint@0Æ eKVQVendpoint@1Æ fKZQZinterrupt-controller@ffc01000 arm,gic-400 < Q ÆÿÀÿÀ ÿÀ@ ÿÀ`  Ê KQefuse@ffb40000rockchip,rockchip-efuseÆÿ´ 8q †pclk_efusecpu_leakage@17Æpinctrlrockchip,rk3288-pinctrlÉAöYÚdefaultsleepèghFgigpio0@ff750000rockchip,gpio-bankÆÿu ÊQ8@ b r < QK0Q0gpio1@ff780000rockchip,gpio-bankÆÿx ÊR8A b r < Qgpio2@ff790000rockchip,gpio-bankÆÿy ÊS8B b r < QKuQugpio3@ff7a0000rockchip,gpio-bankÆÿz ÊT8C b r < Qgpio4@ff7b0000rockchip,gpio-bankÆÿ{ ÊU8D b r < QKyQygpio5@ff7c0000rockchip,gpio-bankÆÿ| ÊV8E b r < QK|Q|gpio6@ff7d0000rockchip,gpio-bankÆÿ} ÊW8F b r < QKIQIgpio7@ff7e0000rockchip,gpio-bankÆÿ~ ÊX8G b r < QK Q gpio8@ff7f0000rockchip,gpio-bankÆÿ ÊY8H b r < Qhdmihdmi-ddc ~jjvcc50-hdmi-en ~jK}Q}pcfg-pull-up ŒKkQkpcfg-pull-down ™KlQlpcfg-pull-none ¨KjQjpcfg-pull-none-12ma ¨ µ KnQnsleepglobal-pwroff ~jKgQgddrio-pwroff ~jddr0-retention ~kddr1-retention ~kedpedp-hpd ~ lK`Q`i2c0i2c0-xfer ~jjKEQEi2c1i2c1-xfer ~jjK,Q,i2c2i2c2-xfer ~ j jKHQHi2c3i2c3-xfer ~jjK-Q-i2c4i2c4-xfer ~jjK.Q.i2c5i2c5-xfer ~jjK3Q3i2s0i2s0-bus` ~jjjjjjKSQSsdmmcsdmmc-clk ~mKQsdmmc-cmd ~mKQsdmmc-cd ~ksdmmc-bus1 ~ksdmmc-bus4@ ~mmmmKQsdmmc-cd-disabled ~jKQsdmmc-cd-gpio ~jKQsdio0sdio0-bus1 ~ksdio0-bus4@ ~mmmmKQsdio0-cmd ~mKQsdio0-clk ~mKQsdio0-cd ~ksdio0-wp ~ksdio0-pwr ~ksdio0-bkpwr ~ksdio0-int ~kwifienable-h ~jKxQxbt-enable-l ~jKwQwsdio1sdio1-bus1 ~ksdio1-bus4@ ~kkkksdio1-cd ~ksdio1-wp ~ksdio1-bkpwr ~ksdio1-int ~ksdio1-cmd ~ksdio1-clk ~jsdio1-pwr ~ kemmcemmc-clk ~mKQemmc-cmd ~mKQemmc-pwr ~ kemmc-bus1 ~kemmc-bus4@ ~kkkkemmc-bus8€ ~mmmmmmmmKQemmc-reset ~ jKtQtspi0spi0-clk ~ kKQspi0-cs0 ~ kK"Q"spi0-tx ~kK Q spi0-rx ~kK!Q!spi0-cs1 ~kspi1spi1-clk ~ kK$Q$spi1-cs0 ~ kK'Q'spi1-rx ~kK&Q&spi1-tx ~kK%Q%spi2spi2-cs1 ~kspi2-clk ~kK(Q(spi2-cs0 ~kK+Q+spi2-rx ~kK*Q*spi2-tx ~ kK)Q)uart0uart0-xfer ~kjK4Q4uart0-cts ~kK5Q5uart0-rts ~jK6Q6uart1uart1-xfer ~k jK7Q7uart1-cts ~ kuart1-rts ~ juart2uart2-xfer ~kjK8Q8uart3uart3-xfer ~kjK9Q9uart3-cts ~ kuart3-rts ~ juart4uart4-xfer ~ k jK:Q:uart4-cts ~kuart4-rts ~jtsadcotp-gpio ~ jK?Q?otp-out ~ jK@Q@pwm0pwm0-pin ~jKKQKpwm1pwm1-pin ~jKLQLpwm2pwm2-pin ~jKMQMpwm3pwm3-pin ~jKNQNgmacrgmii-pinsð ~jjjjnnnnjjj nnjjrmii-pins  ~jjjjjjjjjjspdifspdif-tx ~ jKRQRpcfg-pull-none-drv-8ma ¨ µKmQmpcfg-pull-up-drv-8ma Œ µpcfg-output-high ÄKpQppcfg-output-low ÐKoQobuttonspwr-key-l ~kKqQqap-lid-int-l ~kKrQrpmicpmic-int-l ~kKFQFdvs-1 ~ ldvs-2 ~lrebootap-warm-reset-h ~ jKsQsrecovery-switchrec-mode-l ~ ktpmtpm-int-h ~jwrite-protectfw-wp-ap ~jcodechp-det ~kKQint-codec ~lKJQJmic-det ~ kK~Q~headsetts3a227e-int-l ~kK1Q1backlightbl-en ~jKƒQƒbl_pwr_en ~ jKŽQŽchargerac-present-ap ~kK†Q†cros-ecec-int ~jK#Q#suspendsuspend-l-wake ~oKhQhsuspend-l-sleep ~pKiQitrackpadtrackpad-int ~kK/Q/usb-hosthost1-pwr-en ~ jKŠQŠusbotg-pwren-h ~ jK‹Q‹buck-5vdrv-5v ~jK{Q{lcdlcd-en ~jKŒQŒavdd-1v8-disp-en ~ jK�Q�gpio-keys gpio-keysÚdefaultèqrpower ÛPower S0 át ìdŽlid ÛLid S0Ž á þ ìgpio-restart gpio-restart S0 Údefaultès Èemmc-pwrseqmmc-pwrseq-emmcètÚdefault u KQsdio-pwrseqmmc-pwrseq-simple8v †ext_clockÚdefaultèwx yKQvcc-5vregulator-fixed vcc_5v,>LK@VLK@ $z / B Údefaultè{KGQGvcc33-sysregulator-fixed  vcc33_sys,>2Z V2Z  $zKQvcc50-hdmiregulator-fixed  vcc50_hdmi, $G / B|Údefaultè}sound!rockchip,rockchip-audio-max98090Údefaultè~ GVEYRON-I2S V€ n� ƒI ™I  °‚backlightpwm-backlight Ç  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿ Ù€ ò  ÿÚdefaultèƒ „B@ ' $…KˆQˆgpio-charger gpio-charger 1mains S0Údefaultè†panelinnolux,n116bgesimple-panel’okay $‡ >ˆportsportendpoint ‰KcQcvccsysregulator-fixed vccsys,KzQzvcc5-host1-regulatorregulator-fixed / B0 ÚdefaultèŠ  vcc5_host1,vcc5v-otg-regulatorregulator-fixed / B0 Údefaultè‹  vcc5_host2,panel-regulatorregulator-fixed / B ÚdefaultèŒ panel_regulator H†  $K‡Q‡vcc18-lcdregulator-fixed / Bu Údefaultè�  vcc18_lcd, $backlight-regulatorregulator-fixed / Bu ÚdefaultèŽ backlight_regulator $ H:˜K…Q… #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsreset-namesdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcehid-descr-addrreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosvin-supplyenable-active-highgpiorockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecbrightness-levelsdefault-brightness-levelenable-gpiosbacklight-boot-offpwmspwm-delay-uspower-supplycharger-typebacklightstartup-delay-us