Ð þíý]8õT( õGtechnexion,omap3-thundertechnexion,omap3-tao3530ti,omap34xxti,omap3 +,7TI OMAP3 Thunder baseboard with TAO3530 SOMchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/displaycpus+cpu@0arm,cortex-a8mcpuy}„cpu�“à(žèHà˜Ð�g8¡ O€dp`ð 'À™p¯pmu@54000000arm,cortex-a8-pmuyT€»Ædebugsssocti,omap-inframpu ti,omap3-mpuÆmpuiva ti,iva2.2Æivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busyh» +ÐÆl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ ÐHscm@2000ti,omap3-scmsimple-busy + Ð pinmux@30 ti,omap3-padconfpinctrl-singley08+×èýÿpinmux_hsusbb2_pins`8ÀÂÄ Æ È Ê ¤ ¦ ¨ ª ¬ ® pinmux_mmc1_pinsP8 "$&LíRípinmux_mmc2_pins08(*,.02LñRñpinmux_wlan_gpio8^pinmux_uart3_pins8nApLãRãpinmux_i2c3_pins8’”LéRépinmux_mcspi1_pins 8˜šœžLêRêpinmux_mcspi3_pins 8¬®°²LëRëpinmux_mcbsp3_pins 8<>@BLöRöpinmux_twl4030_pins8°ALäRäpinmux_dss_dpi_pinsà8¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚLüRüpinmux_lte430_pins88LRpinmux_backlight_pins8:LRscm_conf@270sysconsimple-busyp0+ Ðp0LRpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapy°Zpbias_mmc_omap2430apbias_mmc_omap2430pw@ˆ-ÆÀLìRìclocks+mcbsp5_mux_fck@68 ti,composite-mux-clock}­yhLRmcbsp5_fck ti,composite-clock}LøRømcbsp1_mux_fck@4 ti,composite-mux-clock}­yL R mcbsp1_fck ti,composite-clock} LóRómcbsp2_mux_fck@4 ti,composite-mux-clock} ­yL R mcbsp2_fck ti,composite-clock} LôRômcbsp3_mux_fck@68 ti,composite-mux-clock} yhLRmcbsp3_fck ti,composite-clock}LõRõmcbsp4_mux_fck@68 ti,composite-mux-clock} ­yhLRmcbsp4_fck ti,composite-clock}L÷R÷clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singley \+×èýÿpinmux_twl4030_vpins 8LåRåaes@480c5000 ti,omap3-aesÆaesyH PP»ºAB¿txrx Édisabledprm@48306000 ti,omap3-prmyH0`@» clocks+virt_16_8m_ck  fixed-clockÐYLRosc_sys_ck@d40  ti,mux-clock}y @LRsys_ck@1270 ti,divider-clock}­àypëLRsys_clkout1@d70 ti,gate-clock}y p­dpll3_x2_ck fixed-factor-clock} dpll3_m2x2_ck fixed-factor-clock} LRdpll4_x2_ck fixed-factor-clock} corex2_fck fixed-factor-clock} LRwkup_l4_ick fixed-factor-clock} LNRNcorex2_d3_fck fixed-factor-clock} L…R…corex2_d5_fck fixed-factor-clock} L†R†clockdomainscm@48004000 ti,omap3-cmyH@@clocks+dummy_apb_pclk  fixed-clockÐomap_32k_fck  fixed-clockЀL@R@virt_12m_ck  fixed-clockзLRvirt_13m_ck  fixed-clockÐÆ]@LRvirt_19200000_ck  fixed-clockÐ$øLRvirt_26000000_ck  fixed-clockÐŒº€LRvirt_38_4m_ck  fixed-clockÐIðLRdpll4_ck@d00 ti,omap3-dpll-per-clock}y D 0LRdpll4_m2_ck@d48 ti,divider-clock}à?y HëL R dpll4_m2x2_mul_ck fixed-factor-clock}  L!R!dpll4_m2x2_ck@d00 ti,gate-clock}!­y L"R"omap_96m_alwon_fck fixed-factor-clock}" L)R)dpll3_ck@d00 ti,omap3-dpll-core-clock}y @ 0LRdpll3_m3_ck@1140 ti,divider-clock}­ày@ëL#R#dpll3_m3x2_mul_ck fixed-factor-clock}# L$R$dpll3_m3x2_ck@d00 ti,gate-clock}$­ y L%R%emu_core_alwon_ck fixed-factor-clock}% LbRbsys_altclk  fixed-clockÐL.R.mcbsp_clks  fixed-clockÐLRdpll3_m2_ck@d40 ti,divider-clock}­ày @ëLRcore_ck fixed-factor-clock} L&R&dpll1_fck@940 ti,divider-clock}&­ày @ëL'R'dpll1_ck@904 ti,omap3-dpll-clock}'y  $ @ 4LRdpll1_x2_ck fixed-factor-clock} L(R(dpll1_x2m2_ck@944 ti,divider-clock}(ày DëL<R<cm_96m_fck fixed-factor-clock}) L*R*omap_96m_fck@d40  ti,mux-clock}*­y @LEREdpll4_m3_ck@e40 ti,divider-clock}­à y@ëL+R+dpll4_m3x2_mul_ck fixed-factor-clock}+ L,R,dpll4_m3x2_ck@d00 ti,gate-clock},­y L-R-omap_54m_fck@d40  ti,mux-clock}-.­y @L8R8cm_96m_d2_fck fixed-factor-clock}* L/R/omap_48m_fck@d40  ti,mux-clock}/.­y @L0R0omap_12m_fck fixed-factor-clock}0 LGRGdpll4_m4_ck@e40 ti,divider-clock}à y@ëL1R1dpll4_m4x2_mul_ck ti,fixed-factor-clock}1-;HL2R2dpll4_m4x2_ck@d00 ti,gate-clock}2­y HL‰R‰dpll4_m5_ck@f40 ti,divider-clock}à?y@ëL3R3dpll4_m5x2_mul_ck ti,fixed-factor-clock}3-;HL4R4dpll4_m5x2_ck@d00 ti,gate-clock}4­y HLjRjdpll4_m6_ck@1140 ti,divider-clock}­à?y@ëL5R5dpll4_m6x2_mul_ck fixed-factor-clock}5 L6R6dpll4_m6x2_ck@d00 ti,gate-clock}6­y L7R7emu_per_alwon_ck fixed-factor-clock}7 LcRcclkout2_src_gate_ck@d70  ti,composite-no-wait-gate-clock}&­y pL9R9clkout2_src_mux_ck@d70 ti,composite-mux-clock}&*8y pL:R:clkout2_src_ck ti,composite-clock}9:L;R;sys_clkout2@d70 ti,divider-clock};­à@y p[mpu_ck fixed-factor-clock}< L=R=arm_fck@924 ti,divider-clock}=y $àemu_mpu_alwon_ck fixed-factor-clock}= LdRdl3_ick@a40 ti,divider-clock}&ày @ëL>R>l4_ick@a40 ti,divider-clock}>­ày @ëL?R?rm_ick@c40 ti,divider-clock}?­ày @ëgpt10_gate_fck@a00 ti,composite-gate-clock}­ y LARAgpt10_mux_fck@a40 ti,composite-mux-clock}@­y @LBRBgpt10_fck ti,composite-clock}ABgpt11_gate_fck@a00 ti,composite-gate-clock}­ y LCRCgpt11_mux_fck@a40 ti,composite-mux-clock}@­y @LDRDgpt11_fck ti,composite-clock}CDcore_96m_fck fixed-factor-clock}E LRmmchs2_fck@a00 ti,wait-gate-clock}y ­L´R´mmchs1_fck@a00 ti,wait-gate-clock}y ­LµRµi2c3_fck@a00 ti,wait-gate-clock}y ­L¶R¶i2c2_fck@a00 ti,wait-gate-clock}y ­L·R·i2c1_fck@a00 ti,wait-gate-clock}y ­L¸R¸mcbsp5_gate_fck@a00 ti,composite-gate-clock}­ y LRmcbsp1_gate_fck@a00 ti,composite-gate-clock}­ y L R core_48m_fck fixed-factor-clock}0 LFRFmcspi4_fck@a00 ti,wait-gate-clock}Fy ­L¹R¹mcspi3_fck@a00 ti,wait-gate-clock}Fy ­LºRºmcspi2_fck@a00 ti,wait-gate-clock}Fy ­L»R»mcspi1_fck@a00 ti,wait-gate-clock}Fy ­L¼R¼uart2_fck@a00 ti,wait-gate-clock}Fy ­L½R½uart1_fck@a00 ti,wait-gate-clock}Fy ­ L¾R¾core_12m_fck fixed-factor-clock}G LHRHhdq_fck@a00 ti,wait-gate-clock}Hy ­L¿R¿core_l3_ick fixed-factor-clock}> LIRIsdrc_ick@a10 ti,wait-gate-clock}Iy ­LŠRŠgpmc_fck fixed-factor-clock}I core_l4_ick fixed-factor-clock}? LJRJmmchs2_ick@a10 ti,omap3-interface-clock}Jy ­LÀRÀmmchs1_ick@a10 ti,omap3-interface-clock}Jy ­LÁRÁhdq_ick@a10 ti,omap3-interface-clock}Jy ­LÂRÂmcspi4_ick@a10 ti,omap3-interface-clock}Jy ­LÃRÃmcspi3_ick@a10 ti,omap3-interface-clock}Jy ­LÄRÄmcspi2_ick@a10 ti,omap3-interface-clock}Jy ­LÅRÅmcspi1_ick@a10 ti,omap3-interface-clock}Jy ­LÆRÆi2c3_ick@a10 ti,omap3-interface-clock}Jy ­LÇRÇi2c2_ick@a10 ti,omap3-interface-clock}Jy ­LÈRÈi2c1_ick@a10 ti,omap3-interface-clock}Jy ­LÉRÉuart2_ick@a10 ti,omap3-interface-clock}Jy ­LÊRÊuart1_ick@a10 ti,omap3-interface-clock}Jy ­ LËRËgpt11_ick@a10 ti,omap3-interface-clock}Jy ­ LÌRÌgpt10_ick@a10 ti,omap3-interface-clock}Jy ­ LÍRÍmcbsp5_ick@a10 ti,omap3-interface-clock}Jy ­ LÎRÎmcbsp1_ick@a10 ti,omap3-interface-clock}Jy ­ LÏRÏomapctrl_ick@a10 ti,omap3-interface-clock}Jy ­LÐRÐdss_tv_fck@e00 ti,gate-clock}8y­L¯R¯dss_96m_fck@e00 ti,gate-clock}Ey­L°R°dss2_alwon_fck@e00 ti,gate-clock}y­L±R±dummy_ck  fixed-clockÐgpt1_gate_fck@c00 ti,composite-gate-clock}­y LKRKgpt1_mux_fck@c40 ti,composite-mux-clock}@y @LLRLgpt1_fck ti,composite-clock}KLaes2_ick@a10 ti,omap3-interface-clock}J­y LÑRÑwkup_32k_fck fixed-factor-clock}@ LMRMgpio1_dbck@c00 ti,gate-clock}My ­L¦R¦sha12_ick@a10 ti,omap3-interface-clock}Jy ­LÒRÒwdt2_fck@c00 ti,wait-gate-clock}My ­L§R§wdt2_ick@c10 ti,omap3-interface-clock}Ny ­L¨R¨wdt1_ick@c10 ti,omap3-interface-clock}Ny ­L©R©gpio1_ick@c10 ti,omap3-interface-clock}Ny ­LªRªomap_32ksync_ick@c10 ti,omap3-interface-clock}Ny ­L«R«gpt12_ick@c10 ti,omap3-interface-clock}Ny ­L¬R¬gpt1_ick@c10 ti,omap3-interface-clock}Ny ­L­R­per_96m_fck fixed-factor-clock}) L R per_48m_fck fixed-factor-clock}0 LOROuart3_fck@1000 ti,wait-gate-clock}Oy­ LŒRŒgpt2_gate_fck@1000 ti,composite-gate-clock}­yLPRPgpt2_mux_fck@1040 ti,composite-mux-clock}@y@LQRQgpt2_fck ti,composite-clock}PQgpt3_gate_fck@1000 ti,composite-gate-clock}­yLRRRgpt3_mux_fck@1040 ti,composite-mux-clock}@­y@LSRSgpt3_fck ti,composite-clock}RSgpt4_gate_fck@1000 ti,composite-gate-clock}­yLTRTgpt4_mux_fck@1040 ti,composite-mux-clock}@­y@LURUgpt4_fck ti,composite-clock}TUgpt5_gate_fck@1000 ti,composite-gate-clock}­yLVRVgpt5_mux_fck@1040 ti,composite-mux-clock}@­y@LWRWgpt5_fck ti,composite-clock}VWgpt6_gate_fck@1000 ti,composite-gate-clock}­yLXRXgpt6_mux_fck@1040 ti,composite-mux-clock}@­y@LYRYgpt6_fck ti,composite-clock}XYgpt7_gate_fck@1000 ti,composite-gate-clock}­yLZRZgpt7_mux_fck@1040 ti,composite-mux-clock}@­y@L[R[gpt7_fck ti,composite-clock}Z[gpt8_gate_fck@1000 ti,composite-gate-clock}­ yL\R\gpt8_mux_fck@1040 ti,composite-mux-clock}@­y@L]R]gpt8_fck ti,composite-clock}\]gpt9_gate_fck@1000 ti,composite-gate-clock}­ yL^R^gpt9_mux_fck@1040 ti,composite-mux-clock}@­y@L_R_gpt9_fck ti,composite-clock}^_per_32k_alwon_fck fixed-factor-clock}@ L`R`gpio6_dbck@1000 ti,gate-clock}`y­L�R�gpio5_dbck@1000 ti,gate-clock}`y­LŽRŽgpio4_dbck@1000 ti,gate-clock}`y­L�R�gpio3_dbck@1000 ti,gate-clock}`y­L�R�gpio2_dbck@1000 ti,gate-clock}`y­ L‘R‘wdt3_fck@1000 ti,wait-gate-clock}`y­ L’R’per_l4_ick fixed-factor-clock}? LaRagpio6_ick@1010 ti,omap3-interface-clock}ay­L“R“gpio5_ick@1010 ti,omap3-interface-clock}ay­L”R”gpio4_ick@1010 ti,omap3-interface-clock}ay­L•R•gpio3_ick@1010 ti,omap3-interface-clock}ay­L–R–gpio2_ick@1010 ti,omap3-interface-clock}ay­ L—R—wdt3_ick@1010 ti,omap3-interface-clock}ay­ L˜R˜uart3_ick@1010 ti,omap3-interface-clock}ay­ L™R™uart4_ick@1010 ti,omap3-interface-clock}ay­LšRšgpt9_ick@1010 ti,omap3-interface-clock}ay­ L›R›gpt8_ick@1010 ti,omap3-interface-clock}ay­ LœRœgpt7_ick@1010 ti,omap3-interface-clock}ay­L�R�gpt6_ick@1010 ti,omap3-interface-clock}ay­LžRžgpt5_ick@1010 ti,omap3-interface-clock}ay­LŸRŸgpt4_ick@1010 ti,omap3-interface-clock}ay­L R gpt3_ick@1010 ti,omap3-interface-clock}ay­L¡R¡gpt2_ick@1010 ti,omap3-interface-clock}ay­L¢R¢mcbsp2_ick@1010 ti,omap3-interface-clock}ay­L£R£mcbsp3_ick@1010 ti,omap3-interface-clock}ay­L¤R¤mcbsp4_ick@1010 ti,omap3-interface-clock}ay­L¥R¥mcbsp2_gate_fck@1000 ti,composite-gate-clock}­yL R mcbsp3_gate_fck@1000 ti,composite-gate-clock}­yLRmcbsp4_gate_fck@1000 ti,composite-gate-clock}­yLRemu_src_mux_ck@1140  ti,mux-clock}bcdy@LeReemu_src_ck ti,clkdm-gate-clock}eLfRfpclk_fck@1140 ti,divider-clock}f­ày@ëpclkx2_fck@1140 ti,divider-clock}f­ày@ëatclk_fck@1140 ti,divider-clock}f­ày@ëtraceclk_src_fck@1140  ti,mux-clock}bcd­y@LgRgtraceclk_fck@1140 ti,divider-clock}g­ ày@ësecure_32k_fck  fixed-clockЀLhRhgpt12_fck fixed-factor-clock}h wdt1_fck fixed-factor-clock}h security_l4_ick2 fixed-factor-clock}? LiRiaes1_ick@a14 ti,omap3-interface-clock}i­y rng_ick@a14 ti,omap3-interface-clock}iy ­sha11_ick@a14 ti,omap3-interface-clock}iy ­des1_ick@a14 ti,omap3-interface-clock}iy ­cam_mclk@f00 ti,gate-clock}j­yHcam_ick@f10 !ti,omap3-no-wait-interface-clock}?y­LÙRÙcsi2_96m_fck@f00 ti,gate-clock}y­LÚRÚsecurity_l3_ick fixed-factor-clock}> LkRkpka_ick@a14 ti,omap3-interface-clock}ky ­icr_ick@a10 ti,omap3-interface-clock}Jy ­des2_ick@a10 ti,omap3-interface-clock}Jy ­mspro_ick@a10 ti,omap3-interface-clock}Jy ­mailboxes_ick@a10 ti,omap3-interface-clock}Jy ­ssi_l4_ick fixed-factor-clock}? LrRrsr1_fck@c00 ti,wait-gate-clock}y ­sr2_fck@c00 ti,wait-gate-clock}y ­sr_l4_ick fixed-factor-clock}? dpll2_fck@40 ti,divider-clock}&­ày@ëLlRldpll2_ck@4 ti,omap3-dpll-clock}ly$@4qƒ‹LmRmdpll2_m2_ck@44 ti,divider-clock}màyDëLnRniva2_ck@0 ti,wait-gate-clock}ny­LÛRÛmodem_fck@a00 ti,omap3-interface-clock}y ­LÜRÜsad2d_ick@a10 ti,omap3-interface-clock}>y ­LÝRÝmad2d_ick@a18 ti,omap3-interface-clock}>y ­LÞRÞmspro_fck@a00 ti,wait-gate-clock}y ­ssi_ssr_gate_fck_3430es2@a00  ti,composite-no-wait-gate-clock}­y LoRossi_ssr_div_fck_3430es2@a40 ti,composite-divider-clock}­y @$ŸLpRpssi_ssr_fck_3430es2 ti,composite-clock}opLqRqssi_sst_fck_3430es2 fixed-factor-clock}q LþRþhsotgusb_ick_3430es2@a10 "ti,omap3-hsotgusb-interface-clock}Iy ­L‹R‹ssi_ick_3430es2@a10 ti,omap3-ssi-interface-clock}ry ­LÿRÿusim_gate_fck@c00 ti,composite-gate-clock}E­ y L}R}sys_d2_ck fixed-factor-clock} LtRtomap_96m_d2_fck fixed-factor-clock}E LuRuomap_96m_d4_fck fixed-factor-clock}E LvRvomap_96m_d8_fck fixed-factor-clock}E LwRwomap_96m_d10_fck fixed-factor-clock}E LxRxdpll5_m2_d4_ck fixed-factor-clock}s LyRydpll5_m2_d8_ck fixed-factor-clock}s LzRzdpll5_m2_d16_ck fixed-factor-clock}s L{R{dpll5_m2_d20_ck fixed-factor-clock}s L|R|usim_mux_fck@c40 ti,composite-mux-clock(}tuvwxyz{|­y @ëL~R~usim_fck ti,composite-clock}}~usim_ick@c10 ti,omap3-interface-clock}Ny ­ L®R®dpll5_ck@d04 ti,omap3-dpll-clock}y  $ L 4qƒLRdpll5_m2_ck@d50 ti,divider-clock}ày PëLsRssgx_gate_fck@b00 ti,composite-gate-clock}&­y L‡R‡core_d3_ck fixed-factor-clock}& L€R€core_d4_ck fixed-factor-clock}& L�R�core_d6_ck fixed-factor-clock}& L‚R‚omap_192m_alwon_fck fixed-factor-clock}" LƒRƒcore_d2_ck fixed-factor-clock}& L„R„sgx_mux_fck@b40 ti,composite-mux-clock }€�‚*ƒ„…†y @LˆRˆsgx_fck ti,composite-clock}‡ˆsgx_ick@b10 ti,wait-gate-clock}>y ­LßRßcpefuse_fck@a08 ti,gate-clock}y ­LÓRÓts_fck@a08 ti,gate-clock}@y ­LÔRÔusbtll_fck@a08 ti,wait-gate-clock}sy ­LÕRÕusbtll_ick@a18 ti,omap3-interface-clock}Jy ­LÖRÖmmchs3_ick@a10 ti,omap3-interface-clock}Jy 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