Ð þíìî8ä (ÎãèDcompulab,omap3-sbc-t3517compulab,omap3-cm-t3517ti,am3517ti,omap3 +!7CompuLab SBC-T3517 with CM-T3517chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@4809e000 l/connector u/connectorcpus+cpu@0arm,cortex-a8~cpuŠŽ•cpu¡“àpmu@54000000arm,cortex-a8-pmuŠT€¯ºdebugsssocti,omap-inframpu ti,omap3-mpuºmpuiva ti,iva2.2ºiva Ädisableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busŠh¯ +˺l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ ËHscm@2000ti,omap3-scmsimple-busŠ + Ë pinmux@30 ti,omap3-padconfpinctrl-singleŠ08+Òãøÿ3defaultApinmux_uart3_pinsKnp_ÏeÏpinmux_mmc1_pins0K_×e×pinmux_green_led_pinsK²_ðeðpinmux_dss_dpi_pins_common°K¤¦¨ª¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚ_ëeëpinmux_dss_dpi_pins_cm_t35x0K¬®°²´¶_ìeìpinmux_ads7846_pinsKŠ_ÓeÓpinmux_mcspi1_pins K˜šœž_ÒeÒpinmux_i2c1_pinsKŠŒ_ÐeÐpinmux_mcbsp2_pins K _àeàpinmux_hsusb1_phy_reset_pinsKH_óeópinmux_hsusb2_phy_reset_pinsKJ_õeõpinmux_otg_drv_vbusKà_ïeïpinmux_mmc2_pins0K(*,.02_ÛeÛpinmux_wl12xx_core_pinsKˆF_øeøpinmux_usb_hub_pinsKT_epinmux_smsc2_pinsK†¢_çeçpinmux_tfp410_pinsK„_úeúpinmux_i2c3_pinsK’”_ÑeÑpinmux_sb_t35_audio_ampK˜_üeüpinmux_mmc1_aux_pinsK�D_ØeØpinmux_sb_t35_usb_hub_pinsK¼_escm_conf@270sysconsimple-busŠp0+ Ëp0_epbias_regulator@2b0ti,pbias-omap3ti,pbias-omapаmpbias_mmc_omap2430tpbias_mmc_omap2430ƒw@›-ÆÀ_ÖeÖclocks+mcbsp5_mux_fck@68³ti,composite-mux-clockŽÀŠh_ e mcbsp5_fck³ti,composite-clockŽ _ãeãmcbsp1_mux_fck@4³ti,composite-mux-clockŽÀŠ_ e mcbsp1_fck³ti,composite-clockŽ _ÞeÞmcbsp2_mux_fck@4³ti,composite-mux-clockŽ ÀŠ_emcbsp2_fck³ti,composite-clockŽ _ßeßmcbsp3_mux_fck@68³ti,composite-mux-clockŽ Šh_emcbsp3_fck³ti,composite-clockŽ_áeámcbsp4_mux_fck@68³ti,composite-mux-clockŽ ÀŠh_emcbsp4_fck³ti,composite-clockŽ_âeâemac_ick@32c³ti,am35xx-gate-clockŽŠ,À_zezemac_fck@32c³ti,gate-clockŽŠ,À vpfe_ick@32c³ti,am35xx-gate-clockŽŠ,À_{e{vpfe_fck@32c³ti,gate-clockŽŠ,À hsotgusb_ick_am35xx@32c³ti,am35xx-gate-clockŽŠ,À_|e|hsotgusb_fck_am35xx@32c³ti,gate-clockŽŠ,À_}e}hecc_ck@32c³ti,am35xx-gate-clockŽŠ,À_~e~clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singleŠ \+Òãøÿpinmux_wl12xx_wkup_pinsK_÷e÷aes@480c5000 ti,omap3-aesºaesŠH PP¯ÍABÒtxrxprm@48306000 ti,omap3-prmŠH0`@¯ clocks+virt_16_8m_ck³ fixed-clockÜY_eosc_sys_ck@d40³ ti,mux-clockŽŠ @_esys_ck@1270³ti,divider-clockŽÀìŠp÷_esys_clkout1@d70³ti,gate-clockŽŠ pÀdpll3_x2_ck³fixed-factor-clockŽdpll3_m2x2_ck³fixed-factor-clockŽ _"e"dpll4_x2_ck³fixed-factor-clockŽ!corex2_fck³fixed-factor-clockŽ"_#e#wkup_l4_ick³fixed-factor-clockŽ_ReRcorex2_d3_fck³fixed-factor-clockŽ#_sescorex2_d5_fck³fixed-factor-clockŽ#_tetclockdomainscm@48004000 ti,omap3-cmŠH@@clocks+dummy_apb_pclk³ fixed-clockÜomap_32k_fck³ fixed-clockÜ€_DeDvirt_12m_ck³ fixed-clockÜ·_evirt_13m_ck³ fixed-clockÜÆ]@_evirt_19200000_ck³ fixed-clockÜ$ø_evirt_26000000_ck³ fixed-clockÜŒº€_evirt_38_4m_ck³ fixed-clockÜIð_edpll4_ck@d00³ti,omap3-dpll-per-clockŽŠ D 0_!e!dpll4_m2_ck@d48³ti,divider-clockŽ!ì?Š H÷_$e$dpll4_m2x2_mul_ck³fixed-factor-clockŽ$_%e%dpll4_m2x2_ck@d00³ti,gate-clockŽ%ÀŠ #_&e&omap_96m_alwon_fck³fixed-factor-clockŽ&_-e-dpll3_ck@d00³ti,omap3-dpll-core-clockŽŠ @ 0_edpll3_m3_ck@1140³ti,divider-clockŽÀìŠ@÷_'e'dpll3_m3x2_mul_ck³fixed-factor-clockŽ'_(e(dpll3_m3x2_ck@d00³ti,gate-clockŽ(À Š #_)e)emu_core_alwon_ck³fixed-factor-clockŽ)_fefsys_altclk³ fixed-clockÜ_2e2mcbsp_clks³ fixed-clockÜ_edpll3_m2_ck@d40³ti,divider-clockŽÀìŠ @÷_ e core_ck³fixed-factor-clockŽ _*e*dpll1_fck@940³ti,divider-clockŽ*ÀìŠ @÷_+e+dpll1_ck@904³ti,omap3-dpll-clockŽ+Š  $ @ 4_edpll1_x2_ck³fixed-factor-clockŽ_,e,dpll1_x2m2_ck@944³ti,divider-clockŽ,ìŠ D÷_@e@cm_96m_fck³fixed-factor-clockŽ-_.e.omap_96m_fck@d40³ ti,mux-clockŽ.ÀŠ @_IeIdpll4_m3_ck@e40³ti,divider-clockŽ!Àì Š@÷_/e/dpll4_m3x2_mul_ck³fixed-factor-clockŽ/_0e0dpll4_m3x2_ck@d00³ti,gate-clockŽ0ÀŠ #_1e1omap_54m_fck@d40³ ti,mux-clockŽ12ÀŠ @_<e<cm_96m_d2_fck³fixed-factor-clockŽ._3e3omap_48m_fck@d40³ ti,mux-clockŽ32ÀŠ @_4e4omap_12m_fck³fixed-factor-clockŽ4_KeKdpll4_m4_ck@e40³ti,divider-clockŽ!ì Š@÷_5e5dpll4_m4x2_mul_ck³ti,fixed-factor-clockŽ59GT_6e6dpll4_m4x2_ck@d00³ti,gate-clockŽ6ÀŠ #T_xexdpll4_m5_ck@f40³ti,divider-clockŽ!ì?Š@÷_7e7dpll4_m5x2_mul_ck³ti,fixed-factor-clockŽ79GT_8e8dpll4_m5x2_ck@d00³ti,gate-clockŽ8ÀŠ #Tdpll4_m6_ck@1140³ti,divider-clockŽ!Àì?Š@÷_9e9dpll4_m6x2_mul_ck³fixed-factor-clockŽ9_:e:dpll4_m6x2_ck@d00³ti,gate-clockŽ:ÀŠ #_;e;emu_per_alwon_ck³fixed-factor-clockŽ;_gegclkout2_src_gate_ck@d70³ ti,composite-no-wait-gate-clockŽ*ÀŠ p_=e=clkout2_src_mux_ck@d70³ti,composite-mux-clockŽ*.<Š p_>e>clkout2_src_ck³ti,composite-clockŽ=>_?e?sys_clkout2@d70³ti,divider-clockŽ?Àì@Š pgmpu_ck³fixed-factor-clockŽ@_AeAarm_fck@924³ti,divider-clockŽAŠ $ìemu_mpu_alwon_ck³fixed-factor-clockŽA_hehl3_ick@a40³ti,divider-clockŽ*ìŠ @÷_BeBl4_ick@a40³ti,divider-clockŽBÀìŠ @÷_CeCrm_ick@c40³ti,divider-clockŽCÀìŠ @÷gpt10_gate_fck@a00³ti,composite-gate-clockŽÀ Š _EeEgpt10_mux_fck@a40³ti,composite-mux-clockŽDÀŠ @_FeFgpt10_fck³ti,composite-clockŽEFgpt11_gate_fck@a00³ti,composite-gate-clockŽÀ Š _GeGgpt11_mux_fck@a40³ti,composite-mux-clockŽDÀŠ @_HeHgpt11_fck³ti,composite-clockŽGHcore_96m_fck³fixed-factor-clockŽI_emmchs2_fck@a00³ti,wait-gate-clockŽŠ À_¦e¦mmchs1_fck@a00³ti,wait-gate-clockŽŠ À_§e§i2c3_fck@a00³ti,wait-gate-clockŽŠ À_¨e¨i2c2_fck@a00³ti,wait-gate-clockŽŠ À_©e©i2c1_fck@a00³ti,wait-gate-clockŽŠ À_ªeªmcbsp5_gate_fck@a00³ti,composite-gate-clockŽÀ Š _emcbsp1_gate_fck@a00³ti,composite-gate-clockŽÀ Š _ e core_48m_fck³fixed-factor-clockŽ4_JeJmcspi4_fck@a00³ti,wait-gate-clockŽJŠ À_«e«mcspi3_fck@a00³ti,wait-gate-clockŽJŠ À_¬e¬mcspi2_fck@a00³ti,wait-gate-clockŽJŠ À_­e­mcspi1_fck@a00³ti,wait-gate-clockŽJŠ À_®e®uart2_fck@a00³ti,wait-gate-clockŽJŠ À_¯e¯uart1_fck@a00³ti,wait-gate-clockŽJŠ À _°e°core_12m_fck³fixed-factor-clockŽK_LeLhdq_fck@a00³ti,wait-gate-clockŽLŠ À_±e±core_l3_ick³fixed-factor-clockŽB_MeMsdrc_ick@a10³ti,wait-gate-clockŽMŠ À_yeygpmc_fck³fixed-factor-clockŽMcore_l4_ick³fixed-factor-clockŽC_NeNmmchs2_ick@a10³ti,omap3-interface-clockŽNŠ À_²e²mmchs1_ick@a10³ti,omap3-interface-clockŽNŠ À_³e³hdq_ick@a10³ti,omap3-interface-clockŽNŠ À_´e´mcspi4_ick@a10³ti,omap3-interface-clockŽNŠ À_µeµmcspi3_ick@a10³ti,omap3-interface-clockŽNŠ À_¶e¶mcspi2_ick@a10³ti,omap3-interface-clockŽNŠ À_·e·mcspi1_ick@a10³ti,omap3-interface-clockŽNŠ À_¸e¸i2c3_ick@a10³ti,omap3-interface-clockŽNŠ À_¹e¹i2c2_ick@a10³ti,omap3-interface-clockŽNŠ À_ºeºi2c1_ick@a10³ti,omap3-interface-clockŽNŠ À_»e»uart2_ick@a10³ti,omap3-interface-clockŽNŠ À_¼e¼uart1_ick@a10³ti,omap3-interface-clockŽNŠ À _½e½gpt11_ick@a10³ti,omap3-interface-clockŽNŠ À _¾e¾gpt10_ick@a10³ti,omap3-interface-clockŽNŠ À _¿e¿mcbsp5_ick@a10³ti,omap3-interface-clockŽNŠ À _ÀeÀmcbsp1_ick@a10³ti,omap3-interface-clockŽNŠ À _ÁeÁomapctrl_ick@a10³ti,omap3-interface-clockŽNŠ À_ÂeÂdss_tv_fck@e00³ti,gate-clockŽ<ŠÀ_¡e¡dss_96m_fck@e00³ti,gate-clockŽIŠÀ_¢e¢dss2_alwon_fck@e00³ti,gate-clockŽŠÀ_£e£dummy_ck³ fixed-clockÜgpt1_gate_fck@c00³ti,composite-gate-clockŽÀŠ _OeOgpt1_mux_fck@c40³ti,composite-mux-clockŽDŠ @_PePgpt1_fck³ti,composite-clockŽOPaes2_ick@a10³ti,omap3-interface-clockŽNÀŠ _ÃeÃwkup_32k_fck³fixed-factor-clockŽD_QeQgpio1_dbck@c00³ti,gate-clockŽQŠ À_™e™sha12_ick@a10³ti,omap3-interface-clockŽNŠ À_ÄeÄwdt2_fck@c00³ti,wait-gate-clockŽQŠ À_šešwdt2_ick@c10³ti,omap3-interface-clockŽRŠ À_›e›wdt1_ick@c10³ti,omap3-interface-clockŽRŠ À_œeœgpio1_ick@c10³ti,omap3-interface-clockŽRŠ À_�e�omap_32ksync_ick@c10³ti,omap3-interface-clockŽRŠ À_žežgpt12_ick@c10³ti,omap3-interface-clockŽRŠ À_ŸeŸgpt1_ick@c10³ti,omap3-interface-clockŽRŠ À_ e per_96m_fck³fixed-factor-clockŽ-_ e per_48m_fck³fixed-factor-clockŽ4_SeSuart3_fck@1000³ti,wait-gate-clockŽSŠÀ _egpt2_gate_fck@1000³ti,composite-gate-clockŽÀŠ_TeTgpt2_mux_fck@1040³ti,composite-mux-clockŽDŠ@_UeUgpt2_fck³ti,composite-clockŽTUgpt3_gate_fck@1000³ti,composite-gate-clockŽÀŠ_VeVgpt3_mux_fck@1040³ti,composite-mux-clockŽDÀŠ@_WeWgpt3_fck³ti,composite-clockŽVWgpt4_gate_fck@1000³ti,composite-gate-clockŽÀŠ_XeXgpt4_mux_fck@1040³ti,composite-mux-clockŽDÀŠ@_YeYgpt4_fck³ti,composite-clockŽXYgpt5_gate_fck@1000³ti,composite-gate-clockŽÀŠ_ZeZgpt5_mux_fck@1040³ti,composite-mux-clockŽDÀŠ@_[e[gpt5_fck³ti,composite-clockŽZ[gpt6_gate_fck@1000³ti,composite-gate-clockŽÀŠ_\e\gpt6_mux_fck@1040³ti,composite-mux-clockŽDÀŠ@_]e]gpt6_fck³ti,composite-clockŽ\]gpt7_gate_fck@1000³ti,composite-gate-clockŽÀŠ_^e^gpt7_mux_fck@1040³ti,composite-mux-clockŽDÀŠ@__e_gpt7_fck³ti,composite-clockŽ^_gpt8_gate_fck@1000³ti,composite-gate-clockŽÀ Š_`e`gpt8_mux_fck@1040³ti,composite-mux-clockŽDÀŠ@_aeagpt8_fck³ti,composite-clockŽ`agpt9_gate_fck@1000³ti,composite-gate-clockŽÀ Š_bebgpt9_mux_fck@1040³ti,composite-mux-clockŽDÀŠ@_cecgpt9_fck³ti,composite-clockŽbcper_32k_alwon_fck³fixed-factor-clockŽD_dedgpio6_dbck@1000³ti,gate-clockŽdŠÀ_€e€gpio5_dbck@1000³ti,gate-clockŽdŠÀ_�e�gpio4_dbck@1000³ti,gate-clockŽdŠÀ_‚e‚gpio3_dbck@1000³ti,gate-clockŽdŠÀ_ƒeƒgpio2_dbck@1000³ti,gate-clockŽdŠÀ _„e„wdt3_fck@1000³ti,wait-gate-clockŽdŠÀ _…e…per_l4_ick³fixed-factor-clockŽC_eeegpio6_ick@1010³ti,omap3-interface-clockŽeŠÀ_†e†gpio5_ick@1010³ti,omap3-interface-clockŽeŠÀ_‡e‡gpio4_ick@1010³ti,omap3-interface-clockŽeŠÀ_ˆeˆgpio3_ick@1010³ti,omap3-interface-clockŽeŠÀ_‰e‰gpio2_ick@1010³ti,omap3-interface-clockŽeŠÀ _ŠeŠwdt3_ick@1010³ti,omap3-interface-clockŽeŠÀ _‹e‹uart3_ick@1010³ti,omap3-interface-clockŽeŠÀ _ŒeŒuart4_ick@1010³ti,omap3-interface-clockŽeŠÀ_�e�gpt9_ick@1010³ti,omap3-interface-clockŽeŠÀ _ŽeŽgpt8_ick@1010³ti,omap3-interface-clockŽeŠÀ _�e�gpt7_ick@1010³ti,omap3-interface-clockŽeŠÀ_�e�gpt6_ick@1010³ti,omap3-interface-clockŽeŠÀ_‘e‘gpt5_ick@1010³ti,omap3-interface-clockŽeŠÀ_’e’gpt4_ick@1010³ti,omap3-interface-clockŽeŠÀ_“e“gpt3_ick@1010³ti,omap3-interface-clockŽeŠÀ_”e”gpt2_ick@1010³ti,omap3-interface-clockŽeŠÀ_•e•mcbsp2_ick@1010³ti,omap3-interface-clockŽeŠÀ_–e–mcbsp3_ick@1010³ti,omap3-interface-clockŽeŠÀ_—e—mcbsp4_ick@1010³ti,omap3-interface-clockŽeŠÀ_˜e˜mcbsp2_gate_fck@1000³ti,composite-gate-clockŽÀŠ_ e mcbsp3_gate_fck@1000³ti,composite-gate-clockŽÀŠ_emcbsp4_gate_fck@1000³ti,composite-gate-clockŽÀŠ_eemu_src_mux_ck@1140³ ti,mux-clockŽfghŠ@_ieiemu_src_ck³ti,clkdm-gate-clockŽi_jejpclk_fck@1140³ti,divider-clockŽjÀìŠ@÷pclkx2_fck@1140³ti,divider-clockŽjÀìŠ@÷atclk_fck@1140³ti,divider-clockŽjÀìŠ@÷traceclk_src_fck@1140³ ti,mux-clockŽfghÀŠ@_kektraceclk_fck@1140³ti,divider-clockŽkÀ ìŠ@÷secure_32k_fck³ fixed-clockÜ€_lelgpt12_fck³fixed-factor-clockŽlwdt1_fck³fixed-factor-clockŽlipss_ick@a10³ti,am35xx-interface-clockŽMŠ À_ermii_ck³ fixed-clockÜúð€_epclk_ck³ fixed-clockÜ›üÀ_euart4_ick_am35xx@a10³ti,omap3-interface-clockŽNŠ Àuart4_fck_am35xx@a00³ti,wait-gate-clockŽJŠ Àdpll5_ck@d04³ti,omap3-dpll-clockŽŠ  $ L 4}�_memdpll5_m2_ck@d50³ti,divider-clockŽmìŠ P÷_wewsgx_gate_fck@b00³ti,composite-gate-clockŽ*ÀŠ _ueucore_d3_ck³fixed-factor-clockŽ*_nencore_d4_ck³fixed-factor-clockŽ*_oeocore_d6_ck³fixed-factor-clockŽ*_pepomap_192m_alwon_fck³fixed-factor-clockŽ&_qeqcore_d2_ck³fixed-factor-clockŽ*_rersgx_mux_fck@b40³ti,composite-mux-clock Žnop.qrstŠ @_vevsgx_fck³ti,composite-clockŽuvsgx_ick@b10³ti,wait-gate-clockŽBŠ À_ËeËcpefuse_fck@a08³ti,gate-clockŽŠ À_ÅeÅts_fck@a08³ti,gate-clockŽDŠ À_ÆeÆusbtll_fck@a08³ti,wait-gate-clockŽwŠ À_ÇeÇusbtll_ick@a18³ti,omap3-interface-clockŽNŠ À_ÈeÈmmchs3_ick@a10³ti,omap3-interface-clockŽNŠ À_ÉeÉmmchs3_fck@a00³ti,wait-gate-clockŽŠ À_ÊeÊdss1_alwon_fck_3430es2@e00³ti,dss-gate-clockŽxÀŠT_¤e¤dss_ick_3430es2@e10³ti,omap3-dss-interface-clockŽCŠÀ_¥e¥usbhost_120m_fck@1400³ti,gate-clockŽwŠÀ_ÌeÌusbhost_48m_fck@1400³ti,dss-gate-clockŽ4ŠÀ_ÍeÍusbhost_ick@1410³ti,omap3-dss-interface-clockŽCŠÀ_ÎeÎclockdomainscore_l3_clkdmti,clockdomainŽyz{|}~dpll3_clkdmti,clockdomainŽdpll1_clkdmti,clockdomainŽper_clkdmti,clockdomainhŽ€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—˜emu_clkdmti,clockdomainŽjdpll4_clkdmti,clockdomainŽ!wkup_clkdmti,clockdomain Ž™š›œ�žŸ dss_clkdmti,clockdomainŽ¡¢£¤¥core_l4_clkdmti,clockdomain”ަ§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊdpll5_clkdmti,clockdomainŽmsgx_clkdmti,clockdomainŽËusbhost_clkdmti,clockdomain ŽÌÍÎcounter@48320000ti,omap-counter32kŠH2  ºcounter_32kinterrupt-controller@48200000ti,omap3-intcãÒŠH _edma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaŠH`¯ —¢ ¯`_egpio@48310000ti,omap3-gpioŠH1¯ºgpio1¼ÎÞãÒ_ùeùgpio@49050000ti,omap3-gpioŠI¯ºgpio2ÎÞãÒ_ÕeÕgpio@49052000ti,omap3-gpioŠI ¯ºgpio3ÎÞãÒ_èeègpio@49054000ti,omap3-gpioŠI@¯ ºgpio4ÎÞãÒgpio@49056000ti,omap3-gpioŠI`¯!ºgpio5ÎÞãÒ_ÚeÚgpio@49058000ti,omap3-gpioŠI€¯"ºgpio6ÎÞãÒ_ñeñserial@4806a000ti,omap3-uartŠH  êHÍ12Òtxrxºuart1ÜÜlserial@4806c000ti,omap3-uartŠHÀêIÍ34Òtxrxºuart2ÜÜlserial@49020000ti,omap3-uartŠIêJÍ56Òtxrxºuart3ÜÜl3defaultAÏi2c@48070000 ti,omap3-i2cŠH€¯8ÍÒtxrx+ºi2c13defaultAÐÜ€at24@50 at24,24c02þŠPi2c@48072000 ti,omap3-i2cŠH €¯9ÍÒtxrx+ºi2c2i2c@48060000 ti,omap3-i2cŠH€¯=ÍÒtxrx+ºi2c3Ü€3defaultAÑat24@50 at24,24c02þŠPmailbox@48094000ti,omap3-mailboxºmailboxŠH @¯% Ädisableddsp 7 Bspi@48098000ti,omap2-mcspiŠH €¯A+ºmcspi1M@Í#$%&'()* Òtx0rx0tx1rx1tx2rx2tx3rx33defaultAÒads7846@03defaultAÓ ti,ads7846[ÔŠfã` Õ¯ xÕ…Žÿ— ÿ©´¹ÿÉÙ éùspi@4809a000ti,omap2-mcspiŠH  ¯B+ºmcspi2M Í+,-.Òtx0rx0tx1rx1spi@480b8000ti,omap2-mcspiŠH €¯[+ºmcspi3M ÍÒtx0rx0tx1rx1spi@480ba000ti,omap2-mcspiŠH  ¯0+ºmcspi4MÍFGÒtx0rx01w@480b2000 ti,omap3-1wŠH ¯:ºhdq1wmmc@4809c000ti,omap3-hsmmcŠH À¯Sºmmc1Í=>ÒtxrxÖ3defaultAר!+Ù 7Õ @Úmmc@480b4000ti,omap3-hsmmcŠH @¯Vºmmc2Í/0Òtxrx3defaultAÛ+ÜIÝY!g+wlcore@2 ti,wl1271Š Ú¯zIðmmc@480ad000ti,omap3-hsmmcŠH Я^ºmmc3ÍMNÒtxrx Ädisabledmmu@480bd400Žti,omap2-iommuŠH Ô€¯ºmmu_isp› Ädisabledmmu@5d000000Žti,omap2-iommuŠ]€¯ºmmu_iva Ädisabledwdt@48314000 ti,omap3-wdtŠH1@€ ºwd_timer2mcbsp@48074000ti,omap3-mcbspŠH@ÿ«mpu ¯;< µcommontxrxÅ€ºmcbsp1Í ÒtxrxŽÞ•fck Ädisabledmcbsp@49022000ti,omap3-mcbspŠI ÿI€ÿ «mpusidetone¯>?µcommontxrxsidetoneźmcbsp2mcbsp2_sidetoneÍ!"ÒtxrxŽß–•fckickÄok3defaultAàmcbsp@49024000ti,omap3-mcbspŠI@ÿI ÿ «mpusidetone¯YZµcommontxrxsidetoneÅ€ºmcbsp3mcbsp3_sidetoneÍÒtxrxŽá—•fckick Ädisabledmcbsp@49026000ti,omap3-mcbspŠI`ÿ«mpu ¯67 µcommontxrxÅ€ºmcbsp4ÍÒtxrxŽâ•fck Ädisabledmcbsp@48096000ti,omap3-mcbspŠH `ÿ«mpu ¯QR µcommontxrxÅ€ºmcbsp5ÍÒtxrxŽã•fck Ädisabledsham@480c3000ti,omap3-shamºshamŠH 0d¯1ÍEÒrxsmartreflex@480cb000ti,omap3-smartreflex-coreºsmartreflex_coreŠH °¯smartreflex@480c9000ti,omap3-smartreflex-ivaºsmartreflex_mpu_ivaŠH �¯ Ädisabledtimer@48318000ti,omap3430-timerŠH1€¯%ºtimer1Ôtimer@49032000ti,omap3430-timerŠI ¯&ºtimer2timer@49034000ti,omap3430-timerŠI@¯'ºtimer3timer@49036000ti,omap3430-timerŠI`¯(ºtimer4timer@49038000ti,omap3430-timerŠI€¯)ºtimer5ãtimer@4903a000ti,omap3430-timerŠI ¯*ºtimer6ãtimer@4903c000ti,omap3430-timerŠIÀ¯+ºtimer7ãtimer@4903e000ti,omap3430-timerŠIà¯,ºtimer8ðãtimer@49040000ti,omap3430-timerŠI¯-ºtimer9ðtimer@48086000ti,omap3430-timerŠH`¯.ºtimer10ðtimer@48088000ti,omap3430-timerŠH€¯/ºtimer11ðtimer@48304000ti,omap3430-timerŠH0@¯_ºtimer12Ôýusbhstll@48062000 ti,usbhs-tllŠH ¯N ºusb_tll_hsusbhshost@48064000ti,usbhs-hostŠH@ ºusb_host_hs+Ë  ehci-phy ehci-phyohci@48064400ti,ohci-omap3ŠHD ¯Lehci@48064800 ti,ehci-omapŠHH ¯M#äågpmc@6e000000ti,omap3430-gpmcºgpmcŠnЯÍÒrxtx(4+ãÒÎÞ Ë-_æeænand@0,0ti,omap2-nand Š æ¯FUgsww…x—x©¸xËxÞìZû Z2HA<[xlx}º�Z+partition@0§xloaderŠpartition@0x80000§ubootŠpartition@0x260000§uboot environmentŠ&partition@0x2a0000§linuxŠ*@partition@0x6a0000§rootfsŠjˆethernet@4,0smsc,lan9221smsc,lan91153defaultAç è¯ Šÿ­U¸Òw…–—–©¸Ë(û- ŒÞ-ìŒ[›l›2xìKAK�}2éBêP]usb_otg_hs@480ab000ti,omap3-musbŠH °¯\]µmcdma ºusb_otg_hss~† dss@48050000 ti,omap3-dssŠHÄok ºdss_coreޤ•fck+Ë3defaultAëìdispc@48050400ti,omap3-dispcŠH¯ ºdss_dispcޤ•fckencoder@4804fc00 ti,omap3-dsiŠHüHþ@Hÿ «protophypll¯ Ädisabled ºdss_dsi1ޤ£ •fcksys_clkencoder@48050800ti,omap3-rfbiŠH Ädisabled ºdss_rfbiޤ¥•fckickencoder@48050c00ti,omap3-vencŠH Äok ºdss_vencŽ¡•fckportendpoint�íŸportendpoint�î«_ûeûssi-controller@48058000 ti,omap3-ssiºssi ÄdisabledŠH€H�«sysgdd¯Gµgdd_mpu+Ëssi-port@4805a000ti,omap3-ssi-portŠH H¨«txrx ¯CDssi-port@4805b000ti,omap3-ssi-portŠH°H¸«txrx ¯EFam35x_otg_hs@5c040000ti,omap3-musb ºam35x_otg_hsÄokayŠ\¯Gµmc3defaultAïethernet@0x5c000000ti,am3517-emac ºdavinci_emacÄokayŠ\¯CDEFm¶Ñð $7ethernet@0x5c030000ti,davinci_mdio ºdavinci_mdioÄokayŠ\IB@+serial@4809e000ti,omap3-uartºuart4 ÄdisabledŠH à¯TÍ76ÒtxrxÜÜlpinmux@480025d8 ti,omap3-padconfpinctrl-singleŠH%Ø$+Òãøÿmemory@80000000~memoryŠ€leds gpio-leds3defaultAðledb §cm-t3x:green :ñ Rheartbeathsusb1_power_regregulator-fixed thsusb1_vbusƒ2Z ›2Z hp_òeòhsusb2_power_regregulator-fixed thsusb2_vbusƒ2Z ›2Z hp_ôeôhsusb1_phyusb-nop-xceiv[ò3defaultAó yÚ_äeähsusb2_phyusb-nop-xceiv[ô3defaultAõ yÚ_åeåads7846-regregulator-fixed tads7846-regƒ2Z ›2Z _ÔeÔconnectordvi-connector§dviportendpoint�ö_íeíregulator-vmmcregulator-fixedtvmmcƒ2Z ›2Z _ÙeÙwl12xx_vmmc2regulator-fixedtvw12713defaultA÷øƒw@›w@ €ùhN …_ÜeÜwl12xx_vaux2regulator-fixedtvwl1271_vaux2ƒw@›w@_ÝeÝencoder ti,tfp410 ˜Õ3defaultAúports+port@0Šendpoint�û_îeîport@1Šendpoint�í_öeöaudio_ampregulator-fixed taudio_amp3defaultAü €Õ¨ºregulator-vddvario-sb-t35regulator-fixed tvddvarioº_éeéregulator-vdd33a-sb-t35regulator-fixedtvdd33aº_êeê compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpagesize#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplywp-gpioscd-gpiosvmmc_aux-supplynon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsremote-endpointti,channelsdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqlinux,default-triggerstartup-delay-usreset-gpiosenable-active-highpowerdown-gpiosenable-active-lowregulator-always-on