Ð þíý8õl(˜õ4ti,omap3-beagleti,omap3 +7TI OMAP3 BeagleBoardchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/connector0 m/connector1cpus+cpu@0arm,cortex-a8vcpu‚†�cpu™“à(§èHà˜Ð�g8¡ O€dp`ð 'À™p¸pmu@54000000arm,cortex-a8-pmu‚T€ÄÏdebugsssocti,omap-inframpu ti,omap3-mpuÏmpuiva ti,iva2.2Ïivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus‚hÄ +ÙÏl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ ÙHscm@2000ti,omap3-scmsimple-bus‚ + Ù pinmux@30 ti,omap3-padconfpinctrl-single‚08+àñ$ÿAdefaultOYå_åpinmux_hsusb2_pins0g¤ ¦ ¨ ª ¬ ® Y_pinmux_uart3_pinsgnApYæ_æpinmux_tfp410_pinsg–Y_pinmux_dss_dpi_pinsàg¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚY÷_÷pinmux_twl4030_pinsg°AYç_çscm_conf@270sysconsimple-bus‚p0+ Ùp0Y_pbias_regulator@2b0ti,pbias-omap3ti,pbias-omap‚°{pbias_mmc_omap2430‚pbias_mmc_omap2430‘w@©-ÆÀYì_ìclocks+mcbsp5_mux_fck@68Áti,composite-mux-clock†Î‚hY _ mcbsp5_fckÁti,composite-clock† Yó_ómcbsp1_mux_fck@4Áti,composite-mux-clock†Î‚Y _ mcbsp1_fckÁti,composite-clock† Yï_ïmcbsp2_mux_fck@4Áti,composite-mux-clock† ΂Y_mcbsp2_fckÁti,composite-clock† Yð_ðmcbsp3_mux_fck@68Áti,composite-mux-clock† ‚hY_mcbsp3_fckÁti,composite-clock†Yñ_ñmcbsp4_mux_fck@68Áti,composite-mux-clock† ΂hY_mcbsp4_fckÁti,composite-clock†Yò_òclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single‚ \+àñ$ÿpinmux_gpio1_pinsgAYä_äpinmux_twl4030_vpins gYè_èaes@480c5000 ti,omap3-aesÏaes‚H PPÄÛABàtxrxprm@48306000 ti,omap3-prm‚H0`@Ä clocks+virt_16_8m_ckÁ fixed-clockêYY_osc_sys_ck@d40Á ti,mux-clock†‚ @Y_sys_ck@1270Áti,divider-clock†Îú‚pY_sys_clkout1@d70Áti,gate-clock†‚ pÎdpll3_x2_ckÁfixed-factor-clock†'dpll3_m2x2_ckÁfixed-factor-clock†'Y_dpll4_x2_ckÁfixed-factor-clock†'corex2_fckÁfixed-factor-clock†'Y _ wkup_l4_ickÁfixed-factor-clock†'YO_Ocorex2_d3_fckÁfixed-factor-clock† 'Y†_†corex2_d5_fckÁfixed-factor-clock† 'Y‡_‡clockdomainscm@48004000 ti,omap3-cm‚H@@clocks+dummy_apb_pclkÁ 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$úemu_mpu_alwon_ckÁfixed-factor-clock†>'Ye_el3_ick@a40Áti,divider-clock†'ú‚ @Y?_?l4_ick@a40Áti,divider-clock†?Îú‚ @Y@_@rm_ick@c40Áti,divider-clock†@Îú‚ @gpt10_gate_fck@a00Áti,composite-gate-clock†Î ‚ YB_Bgpt10_mux_fck@a40Áti,composite-mux-clock†A΂ @YC_Cgpt10_fckÁti,composite-clock†BCgpt11_gate_fck@a00Áti,composite-gate-clock†Î ‚ YD_Dgpt11_mux_fck@a40Áti,composite-mux-clock†A΂ @YE_Egpt11_fckÁti,composite-clock†DEcore_96m_fckÁfixed-factor-clock†F'Y_mmchs2_fck@a00Áti,wait-gate-clock†‚ ÎYµ_µmmchs1_fck@a00Áti,wait-gate-clock†‚ ÎY¶_¶i2c3_fck@a00Áti,wait-gate-clock†‚ ÎY·_·i2c2_fck@a00Áti,wait-gate-clock†‚ ÎY¸_¸i2c1_fck@a00Áti,wait-gate-clock†‚ ÎY¹_¹mcbsp5_gate_fck@a00Áti,composite-gate-clock†Î ‚ Y_mcbsp1_gate_fck@a00Áti,composite-gate-clock†Î ‚ Y _ core_48m_fckÁfixed-factor-clock†1'YG_Gmcspi4_fck@a00Áti,wait-gate-clock†G‚ ÎYº_ºmcspi3_fck@a00Áti,wait-gate-clock†G‚ ÎY»_»mcspi2_fck@a00Áti,wait-gate-clock†G‚ ÎY¼_¼mcspi1_fck@a00Áti,wait-gate-clock†G‚ ÎY½_½uart2_fck@a00Áti,wait-gate-clock†G‚ ÎY¾_¾uart1_fck@a00Áti,wait-gate-clock†G‚ Î Y¿_¿core_12m_fckÁfixed-factor-clock†H'YI_Ihdq_fck@a00Áti,wait-gate-clock†I‚ ÎYÀ_Àcore_l3_ickÁfixed-factor-clock†?'YJ_Jsdrc_ick@a10Áti,wait-gate-clock†J‚ ÎY‹_‹gpmc_fckÁfixed-factor-clock†J'core_l4_ickÁfixed-factor-clock†@'YK_Kmmchs2_ick@a10Áti,omap3-interface-clock†K‚ ÎYÁ_Ámmchs1_ick@a10Áti,omap3-interface-clock†K‚ ÎYÂ_Âhdq_ick@a10Áti,omap3-interface-clock†K‚ ÎYÃ_Ãmcspi4_ick@a10Áti,omap3-interface-clock†K‚ ÎYÄ_Ämcspi3_ick@a10Áti,omap3-interface-clock†K‚ ÎYÅ_Åmcspi2_ick@a10Áti,omap3-interface-clock†K‚ ÎYÆ_Æmcspi1_ick@a10Áti,omap3-interface-clock†K‚ ÎYÇ_Çi2c3_ick@a10Áti,omap3-interface-clock†K‚ ÎYÈ_Èi2c2_ick@a10Áti,omap3-interface-clock†K‚ ÎYÉ_Éi2c1_ick@a10Áti,omap3-interface-clock†K‚ ÎYÊ_Êuart2_ick@a10Áti,omap3-interface-clock†K‚ ÎYË_Ëuart1_ick@a10Áti,omap3-interface-clock†K‚ Î YÌ_Ìgpt11_ick@a10Áti,omap3-interface-clock†K‚ Î YÍ_Ígpt10_ick@a10Áti,omap3-interface-clock†K‚ Î YÎ_Îmcbsp5_ick@a10Áti,omap3-interface-clock†K‚ Î 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0display1device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0linux,phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthstatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-modephysgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optrb-gpiosnand-bus-widthgpmc,device-widthgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,wr-access-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellslinux,default-triggergpiostartup-delay-usreset-gpiosvcc-supplyti,modelti,mcbsplinux,codewakeup-sourcepowerdown-gpiosdigitalddc-i2c-busslave-mode