Ð þí7}84ð(�4¸5samsung,xyref5260samsung,exynos5260samsung,exynos5 +,7SAMSUNG XYREF5260 board based on EXYNOS5260aliases=/soc/pinctrl@11600000F/soc/pinctrl@12290000O/soc/pinctrl@128B0000X/soc/serial@12C00000`/soc/serial@12C10000h/soc/serial@12C20000p/soc/serial@12860000cpus+cpu@0xcpuarm,cortex-a15„ˆcpu@1xcpuarm,cortex-a15„ˆcpu@100xcpuarm,cortex-a7„ˆcpu@101xcpuarm,cortex-a7„ˆcpu@102xcpuarm,cortex-a7„ˆcpu@103xcpuarm,cortex-a7„ˆsoc simple-bus+™clock-controller@10010000samsung,exynos5260-clock-top„ ­³clock-controller@10200000samsung,exynos5260-clock-peri„  ­³clock-controller@10600000samsung,exynos5260-clock-egl„` clock-controller@10700000samsung,exynos5260-clock-kfc„p clock-controller@10A00000samsung,exynos5260-clock-g2d„  clock-controller@10CE0000samsung,exynos5260-clock-mif„Πclock-controller@11090000samsung,exynos5260-clock-mfc„  clock-controller@11830000samsung,exynos5260-clock-g3d„ƒ clock-controller@122E0000samsung,exynos5260-clock-fsys„. ­³clock-controller@128C0000samsung,exynos5260-clock-aud„Œ ­³clock-controller@133C0000samsung,exynos5260-clock-isp„< clock-controller@13F00000samsung,exynos5260-clock-gscl„ð clock-controller@14550000samsung,exynos5260-clock-disp„U interrupt-controller@10481000%arm,cortex-a15-gicarm,cortex-a9-gic»+Ì „HH H@ H`  á ­³chipid@10000000samsung,exynos4210-chipid„mct@100B0000samsung,exynos4210-mct„  ì  ófin_pllmct�áhijkz{|}~€�cci@10F00000 arm,cci-400+„ð ™ð`slave-if@4000arm,cci-400-ctrl-ifÿace„@­³slave-if@5000arm,cci-400-ctrl-ifÿace„P­³pinctrl@11600000samsung,exynos5260-pinctrl„` áOwakeup-interrupt-controllersamsung,exynos4210-wakeup-eint  á gpa0Ì»gpa1Ì»gpa2Ì»gpb0Ì»gpb1Ì»gpb2Ì»gpb3Ì»gpb4Ì»gpb5Ì»gpd0Ì»gpd1Ì»gpd2Ì»gpe0Ì»gpe1Ì»gpf0Ì»gpf1Ì»gpk0Ì»gpx0Ì»gpx1Ì»gpx2Ì»gpx3Ì»uart0-data*gpa0-0gpa0-17L\uart0-fctl*gpa0-2gpa0-37L\uart1-data*gpa1-0gpa1-17L\uart1-fctl*gpa1-2gpa1-37L\uart2-data*gpa1-4gpa1-57L\spi0-bus*gpa2-0gpa2-2gpa2-37L\spi1-bus*gpa2-4gpa2-6gpa2-77L\usb3-vbus0-en*gpa2-47L\i2s1-bus#*gpb0-0gpb0-1gpb0-2gpb0-3gpb0-47L\pcm1-bus#*gpb0-0gpb0-1gpb0-2gpb0-3gpb0-47L\spdif1-bus*gpb0-0gpb0-1gpb0-27L\spi2-bus*gpb1-0gpb1-2gpb1-37L\i2c0-hs-bus*gpb3-0gpb3-17L\i2c1-hs-bus*gpb3-2gpb3-37L\i2c2-hs-bus*gpb3-4gpb3-57L\i2c3-hs-bus*gpb3-6gpb3-77L\i2c4-bus*gpb4-0gpb4-17L\i2c5-bus*gpb4-2gpb4-37L\i2c6-bus*gpb4-4gpb4-57L\i2c7-bus*gpb4-6gpb4-77L\i2c8-bus*gpb5-0gpb5-17L\i2c9-bus*gpb5-2gpb5-37L\i2c10-bus*gpb5-4gpb5-57L\i2c11-bus*gpb5-6gpb5-77L\cam-gpio-aF*gpe0-0gpe0-1gpe0-2gpe0-3gpe0-4gpe0-5gpe0-6gpe0-7gpe1-0gpe1-17L\cam-gpio-b8*gpf0-0gpf0-1gpf0-2gpf0-3gpf1-0gpf1-1gpf1-2gpf1-37L\cam-i2c1-bus*gpf0-2gpf0-37L\cam-i2c0-bus*gpf0-0gpf0-17L\cam-spi0-bus*gpf1-0gpf1-1gpf1-2gpf1-37L\cam-spi1-bus*gpf1-4gpf1-5gpf1-6gpf1-77L\hdmi-hpd-irq*gpx3-77L\pinctrl@12290000samsung,exynos5260-pinctrl„) á�gpc0Ì»gpc1Ì»gpc2Ì»gpc3Ì»gpc4Ì»sd0-clk*gpc0-07L\­ ³ sd0-cmd*gpc0-17L\­ ³ sd0-bus-width1*gpc0-27L\­ ³ sd0-bus-width4*gpc0-3gpc0-4gpc0-57L\­ ³ sd0-bus-width8*gpc3-0gpc3-1gpc3-2gpc3-37L\­³sd0-rdqs*gpc0-67L\­ ³ sd1-clk*gpc1-07L\sd1-cmd*gpc1-17L\sd1-bus-width1*gpc1-27L\sd1-bus-width4*gpc1-3gpc1-4gpc1-57L\sd1-bus-width8*gpc4-0gpc4-1gpc4-2gpc4-37L\sd2-clk*gpc2-07L\­³sd2-cmd*gpc2-17L\­³sd2-cd*gpc2-27L\­³sd2-bus-width1*gpc2-37L\­³sd2-bus-width4*gpc2-4gpc2-5gpc2-67L\­³pinctrl@128B0000samsung,exynos5260-pinctrl„‹ áógpz0Ì»gpz1Ì»system-controller@10D50000samsung,exynos5260-pmusyscon„Õserial@12C00000samsung,exynos4210-uart„À á’ì<óuartclk_uart_baud0lokayserial@12C10000samsung,exynos4210-uart„Á á“ì;óuartclk_uart_baud0lokayserial@12C20000samsung,exynos4210-uart„ á”ì:óuartclk_uart_baud0lokayserial@12860000samsung,exynos4210-uart„† á‘ì óuartclk_uart_baud0lokaymmc@12140000samsung,exynos5250-dw-mshc„  áœ+ìlóbiucius@lokay~ˆ’�¯ÃÈÕí#default1 ;mmc@12150000samsung,exynos5250-dw-mshc„  áž+ì kóbiucius@ ldisabledmmc@12160000samsung,exynos5250-dw-mshc„  áŸ+ì jóbiucius@lokay~EÃÈÕí#default1;Vmemory@20000000xmemory„ €chosenaconsole=ttySAC2,115200xxti fixed-clockjn6zfin_pll ­³xrtcxti fixed-clockj€zxrtcxti  compatibleinterrupt-parent#address-cells#size-cellsmodelpinctrl0pinctrl1pinctrl2serial0serial1serial2serial3device_typeregcci-control-portranges#clock-cellslinux,phandle#interrupt-cellsinterrupt-controllerinterruptsclocksclock-namesinterface-typegpio-controller#gpio-cellssamsung,pinssamsung,pin-functionsamsung,pin-pudsamsung,pin-drvstatusfifo-depthnum-slotsbroken-cdbypass-smucap-mmc-highspeedsupports-hs200-modecard-detect-delaysamsung,dw-mshc-ciu-divsamsung,dw-mshc-sdr-timingsamsung,dw-mshc-ddr-timingpinctrl-namespinctrl-0bus-widthcap-sd-highspeeddisable-wpbootargsclock-frequencyclock-output-names