Ð þí‡'8~L(Û~vscom,onriscti,am33xx +7OnRISC Baltos iR 5221chosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/can@481cc000ƒ/ocp/can@481d0000Š/ocp/usb@47400000/usb@47401000�/ocp/usb@47400000/usb@47401800#”/ocp/usb@47400000/usb-phy@47401300#™/ocp/usb@47400000/usb-phy@47401b00&ž/ocp/ethernet@4a100000/slave@4a100200&¨/ocp/ethernet@4a100000/slave@4a100300cpus+cpu@0arm,cortex-a8²cpu¾  ü€›ˆ 'À±(¡ *ˆ28*ˆÓåìcpuø“àpmuarm,cortex-a8-pmusocti,omap-inframpu ti,omap3-mpumpuocp simple-bus+'l3_mainl4_wkup@44c00000ti,am3-l4-wkupsimple-bus+ 'DÀ(wkup_m3@100000ti,am3352-wkup-m3¾@  .umemdmemwkup_m38am335x-pm-firmware.elfG%M%prcm@200000 ti,am3-prcm¾ @clocks+clk_32768_ckU fixed-clockb€GMclk_rc32k_ckU fixed-clockb}GMvirt_19200000_ckU fixed-clockb$øG M virt_24000000_ckU fixed-clockbn6G!M!virt_25000000_ckU fixed-clockb}x@G"M"virt_26000000_ckU fixed-clockbŒº€G#M#tclkin_ckU fixed-clockb·GMdpll_core_ck@490Uti,am3-dpll-core-clockå ¾�\hGMdpll_core_x2_ckUti,am3-dpll-x2-clockåGMdpll_core_m4_ck@480Uti,divider-clockår¾€}GMdpll_core_m5_ck@484Uti,divider-clockår¾„}GMdpll_core_m6_ck@4d8Uti,divider-clockår¾Ø}dpll_mpu_ck@488Uti,am3-dpll-clockå ¾ˆ ,GMdpll_mpu_m2_ck@4a8Uti,divider-clockår¾¨}dpll_ddr_ck@494Uti,am3-dpll-no-gate-clockå ¾”4@GMdpll_ddr_m2_ck@4a0Uti,divider-clockår¾ }GMdpll_ddr_m2_div2_ckUfixed-factor-clock唟dpll_disp_ck@498Uti,am3-dpll-no-gate-clockå ¾˜HTG M dpll_disp_m2_ck@4a4Uti,divider-clockå r¾¤}©GMdpll_per_ck@48cU!ti,am3-dpll-no-gate-j-type-clockå ¾ŒpœG M dpll_per_m2_ck@4acUti,divider-clockå r¾¬}G M dpll_per_m2_div4_wkupdm_ckUfixed-factor-clockå ”Ÿdpll_per_m2_div4_ckUfixed-factor-clockå ”Ÿcefuse_fck@a20Uti,gate-clockå¼¾ clk_24mhzUfixed-factor-clockå ”ŸG M clkdiv32k_ckUfixed-factor-clockå ”ŸÜG M clkdiv32k_ick@14cUti,gate-clockå ¼¾LGMl3_gclkUfixed-factor-clock唟GMpruss_ocp_gclk@530U ti,mux-clockå¾0mmu_fck@914Uti,gate-clockå¼¾ timer1_fck@528U ti,mux-clockå¾(timer2_fck@508U ti,mux-clock å¾timer3_fck@50cU ti,mux-clock å¾ timer4_fck@510U ti,mux-clock å¾timer5_fck@518U ti,mux-clock å¾timer6_fck@51cU ti,mux-clock å¾timer7_fck@504U ti,mux-clock å¾usbotg_fck@47cUti,gate-clockå ¼¾|dpll_core_m4_div2_ckUfixed-factor-clock唟GMieee5000_fck@e4Uti,gate-clockå¼¾äwdt1_fck@538U ti,mux-clockå¾8l4_rtc_gclkUfixed-factor-clock唟l4hs_gclkUfixed-factor-clock唟l3s_gclkUfixed-factor-clock唟l4fw_gclkUfixed-factor-clock唟l4ls_gclkUfixed-factor-clock唟G$M$sysclk_div_ckUfixed-factor-clock唟cpsw_125mhz_gclkUfixed-factor-clock唟GFMFcpsw_cpts_rft_clk@520U ti,mux-clockå¾ GGMGgpio0_dbclk_mux_ck@53cU ti,mux-clock å¾<GMgpio0_dbclk@408Uti,gate-clockå¼¾gpio1_dbclk@acUti,gate-clockå¼¾¬gpio2_dbclk@b0Uti,gate-clockå¼¾°gpio3_dbclk@b4Uti,gate-clockå¼¾´lcd_gclk@534U ti,mux-clock å ¾4©GMmmc_clkUfixed-factor-clockå ”Ÿgfx_fclk_clksel_ck@52cU ti,mux-clockå ¼¾,GMgfx_fck_div_ck@52cUti,divider-clockå¾,rsysclkout_pre_ck@700U ti,mux-clockå ¾GMclkout2_div_ck@700Uti,divider-clockå¼r¾GMdbg_sysclk_ck@414Uti,gate-clockå¼¾GMdbg_clka_ck@414Uti,gate-clockå¼¾GMstm_pmd_clock_mux_ck@414U ti,mux-clockå¼¾GMtrace_pmd_clk_mux_ck@414U ti,mux-clockå¼¾GMstm_clk_div_ck@414Uti,divider-clockå¼r@¾Étrace_clk_div_ck@414Uti,divider-clockå¼r@¾Éclkout2_ck@700Uti,gate-clockå¼¾clockdomainsclk_24mhz_clkdmti,clockdomainåscm@210000ti,am3-scmsimple-bus¾! + '! pinmux@800pinctrl-single¾8+ß ýpinmux_mmc2_pins8 2$2(2,2€2„2ä7G9M9pinmux_wl12xx_gpioèGPMPpinmux_tps65910_pinsx7G2M2pinmux_i2c1_pinsX*\*G1M1pinmux_uart0_pinsp0tG,M,cpsw_default˜ !$(<!@!D @D"HLPTX\"`"d"h"l"GHMHcpsw_sleep˜ ''$'('<'@'D'@'D'H'L'P'T'X'\'`'d'h'l'GIMIdavinci_mdio_defaultH0LGJMJdavinci_mdio_sleepH'L'GKMKnandflash_pins_s0x000 00000p0t7|�”˜œGMMMpinmux_tca6416_pins´7G5M5pinmux_dcan1_pinsh l*G>M>pinmux_uart1_pins@€(„(x |àä'è'ì'G-M-pinmux_uart2_pinsHP)T ˆ"Œ04'8'<' 7G/M/scm_conf@0syscon¾+G<M<clocks+sys_clkin_ck@40U ti,mux-clockå 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d_can0d_can1usb0usb1phy0phy1ethernet0ethernet1device_typeregoperating-pointsvoltage-toleranceclocksclock-namesclock-latencycpu0-supplyinterruptsti,hwmodsrangesreg-namesti,pm-firmwarelinux,phandle#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shiftti,index-power-of-twopinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,rprocmboxes#dma-cellsdma-requestsdma-mastersinterrupt-controller#interrupt-cellsinterrupt-namesti,tptcsti,edma-memcpy-channelsgpio-controller#gpio-cellsti,no-reset-on-initstatusdmasdma-namespinctrl-namespinctrl-0dtr-gpiosdsr-gpiosdcd-gpiosrng-gpiosvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyti,en-ck32k-xtalregulator-compatibleregulator-always-onregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onpagesizeti,dual-voltti,needs-special-resetti,needs-special-hs-handlingvmmc-supplyti,non-removablebus-widthcap-power-off-card#hwlock-cellssyscon-raminit#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-send-noirqti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmti,spi-num-csti,ctrl_moddr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizeno_bd_rammac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftsysconpinctrl-1dual_emacbus_freqmac-addressphy-modedual_emac_res_vlanspeedfull-duplexphy_idrmii-clock-ext#io-channel-cellsti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsrb-gpiosnand-bus-widthti,nand-ecc-optti,nand-xfer-typegpmc,device-nandgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsti,elm-idgpiostartup-delay-usenable-active-high