Ð þ퉵8€Ø(Ý€ *chipspark,popmetal-rk3288rockchip,rk3288&7PopMetal-RK3288chosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000…/serial@ff190000�/serial@ff690000•/serial@ff1b0000�/serial@ff1c0000¥/spi@ff110000ª/spi@ff120000¯/spi@ff130000memory´memoryÀ€arm-pmuarm,cortex-a12-pmu0Ä—˜™šÏcpusârockchip,rk3066-smpðcpu@500´cpuarm,cortex-a12Àý`‰@™p@Ö ›@O€O€Èàa€� s€B@ žÀ~ð 'À » 9À » ÂÀ » KÀ » ì0 » $œ@29EKcpu@501´cpuarm,cortex-a12ÀýEKcpu@502´cpuarm,cortex-a12ÀýEKcpu@503´cpuarm,cortex-a12ÀýEKamba simple-busSdma-controller@ff250000arm,pl330arm,primecellÀÿ%@ÄZe2 €apb_pclkEKdma-controller@ff600000arm,pl330arm,primecellÀÿ`@ÄZe2Á €apb_pclk Œdisableddma-controller@ffb20000arm,pl330arm,primecellÀÿ²@ÄZe2Á €apb_pclkEMKMreserved-memorySdma-unusable@fe000000Àþoscillator fixed-clock“n6£xin24m¶E K timerarm,armv7-timerÃ0Ä   “n6timer@ff810000rockchip,rk3288-timerÀÿ�  ÄH 2 a €timerpclkdisplay-subsystemrockchip,display-subsystemç dwmmc@ff0c0000rockchip,rk3288-dw-mshcí€ðÑ€ 2ÈDrv€biuciuciu-driveciu-sample Ä Àÿ @Œokay '8ÈJU_defaultm wƒdwmmc@ff0d0000rockchip,rk3288-dw-mshcí€ðÑ€ 2ÉEsw€biuciuciu-driveciu-sample Ä!Àÿ @ Œdisableddwmmc@ff0e0000rockchip,rk3288-dw-mshcí€ðÑ€ 2ÊFtx€biuciuciu-driveciu-sample Ä"Àÿ@ Œdisableddwmmc@ff0f0000rockchip,rk3288-dw-mshcí€ðÑ€ 2ËGuy€biuciuciu-driveciu-sample Ä#Àÿ@Œokay J�U_defaultmwƒsaradc@ff100000rockchip,saradcÀÿ Ä$ž2I[€saradcapb_pclkýW °saradc-apb Œdisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2AR€spiclkapb_pclk¼  Átxrx Ä,_defaultmÀÿ Œdisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BS€spiclkapb_pclk¼ Átxrx Ä-_defaultm Àÿ Œdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CT€spiclkapb_pclk¼Átxrx Ä._defaultm!"#$Àÿ Œdisabledi2c@ff140000rockchip,rk3288-i2cÀÿ Ä>€i2c2M_defaultm%Œokay“€ak8963@0dasahi-kasei,ak8975À &&Ä_defaultm'ËÖl3g4200d@69st,l3g4200d-gyroáÀiËñmma8452@1d fsl,mma8452À&&Ä_defaultm(i2c@ff150000rockchip,rk3288-i2cÀÿ Ä?€i2c2O_defaultm)Œokayi2c@ff160000rockchip,rk3288-i2cÀÿ Ä@€i2c2P_defaultm*Œokayi2c@ff170000rockchip,rk3288-i2cÀÿ ÄA€i2c2Q_defaultm+ŒokayE^K^serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uartÀÿ Ä7þ2MU€baudclkapb_pclk_defaultm,Œokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uartÀÿ Ä8þ2NV€baudclkapb_pclk_defaultm-Œokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uartÀÿi Ä9þ2OW€baudclkapb_pclk_defaultm.Œokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uartÀÿ Ä:þ2PX€baudclkapb_pclk_defaultm/Œokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uartÀÿ Ä;þ2QY€baudclkapb_pclk_defaultm0Œokaythermal-zonesreserve_thermalè+ˆ91cpu_thermald+ˆ91tripscpu_alert0IpUлpassiveE2K2cpu_alert1I$øUлpassiveE3K3cpu_critI_�UÐ »criticalcooling-mapsmap0`2 eÿÿÿÿmap1`3 eÿÿÿÿÿÿÿÿgpu_thermald+ˆ91tripsgpu_alert0IpUлpassiveE4K4gpu_critI_�UÐ »criticalcooling-mapsmap0`4 eÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3288-tsadcÀÿ( Ä%2HZ€tsadcapb_pclkýŸ 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#address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsreset-namesdmasdma-namesvdd-supplyvid-supplyst,drdy-int-pinvddio-supplyreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmarockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthautorepeatgpioslinux,codelabellinux,input-typedebounce-intervalvin-supplystartup-delay-usenable-active-high