Ð þíó8ì(õëäti,omap3430-sdpti,omap3 +7TI OMAP3430 SDPaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000cpus+cpu@0arm,cortex-a8dcpupt{cpu‡“à(•èHà˜Ð�g8¡ O€dp`ð 'À™ppmu@54000000arm,cortex-a8-pmupT€¦±debugsssocti,omap-inframpu ti,omap3-mpu±mpuiva ti,iva2.2±ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busph¦ +»±l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ »Hscm@2000ti,omap3-scmsimple-busp + » pinmux@30 ti,omap3-padconfpinctrl-singlep08+ÂÓèÿpinmux_twl4030_pins#°A7â=âscm_conf@270sysconsimple-buspp0+ »p07=pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapp°Epbias_mmc_omap2430Lpbias_mmc_omap2430[w@s-ÆÀ7ç=çclocks+mcbsp5_mux_fck@68‹ti,composite-mux-clockt˜ph7=mcbsp5_fck‹ti,composite-clockt7î=îmcbsp1_mux_fck@4‹ti,composite-mux-clockt˜p7 = mcbsp1_fck‹ti,composite-clockt 7ê=êmcbsp2_mux_fck@4‹ti,composite-mux-clockt ˜p7 = mcbsp2_fck‹ti,composite-clockt 7ë=ëmcbsp3_mux_fck@68‹ti,composite-mux-clockt ph7=mcbsp3_fck‹ti,composite-clockt 7ì=ìmcbsp4_mux_fck@68‹ti,composite-mux-clockt ˜ph7=mcbsp4_fck‹ti,composite-clockt7í=íclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlep \+ÂÓèÿpinmux_twl4030_vpins #7ã=ãaes@480c5000 ti,omap3-aes±aespH PP¦¥ABªtxrxprm@48306000 ti,omap3-prmpH0`@¦ clocks+virt_16_8m_ck‹ fixed-clock´Y7=osc_sys_ck@d40‹ ti,mux-clocktp @7=sys_ck@1270‹ti,divider-clockt˜ÄppÏ7=sys_clkout1@d70‹ti,gate-clocktp p˜dpll3_x2_ck‹fixed-factor-clocktæñdpll3_m2x2_ck‹fixed-factor-clocktæñ7=dpll4_x2_ck‹fixed-factor-clocktæñcorex2_fck‹fixed-factor-clocktæñ7=wkup_l4_ick‹fixed-factor-clocktæñ7M=Mcorex2_d3_fck‹fixed-factor-clocktæñ7„=„corex2_d5_fck‹fixed-factor-clocktæñ7…=…clockdomainscm@48004000 ti,omap3-cmpH@@clocks+dummy_apb_pclk‹ fixed-clock´omap_32k_fck‹ fixed-clock´€7?=?virt_12m_ck‹ fixed-clock´·7=virt_13m_ck‹ fixed-clock´Æ]@7=virt_19200000_ck‹ fixed-clock´$ø7=virt_26000000_ck‹ fixed-clock´Œº€7=virt_38_4m_ck‹ fixed-clock´Ið7=dpll4_ck@d00‹ti,omap3-dpll-per-clocktp D 07=dpll4_m2_ck@d48‹ti,divider-clocktÄ?p HÏ7=dpll4_m2x2_mul_ck‹fixed-factor-clocktæñ7 = dpll4_m2x2_ck@d00‹ti,gate-clockt ˜p û7!=!omap_96m_alwon_fck‹fixed-factor-clockt!æñ7(=(dpll3_ck@d00‹ti,omap3-dpll-core-clocktp @ 07=dpll3_m3_ck@1140‹ti,divider-clockt˜Äp@Ï7"="dpll3_m3x2_mul_ck‹fixed-factor-clockt"æñ7#=#dpll3_m3x2_ck@d00‹ti,gate-clockt#˜ p û7$=$emu_core_alwon_ck‹fixed-factor-clockt$æñ7a=asys_altclk‹ fixed-clock´7-=-mcbsp_clks‹ fixed-clock´7=dpll3_m2_ck@d40‹ti,divider-clockt˜Äp @Ï7=core_ck‹fixed-factor-clocktæñ7%=%dpll1_fck@940‹ti,divider-clockt%˜Äp @Ï7&=&dpll1_ck@904‹ti,omap3-dpll-clockt&p  $ @ 47=dpll1_x2_ck‹fixed-factor-clocktæñ7'='dpll1_x2m2_ck@944‹ti,divider-clockt'Äp DÏ7;=;cm_96m_fck‹fixed-factor-clockt(æñ7)=)omap_96m_fck@d40‹ ti,mux-clockt)˜p @7D=Ddpll4_m3_ck@e40‹ti,divider-clockt˜Ä p@Ï7*=*dpll4_m3x2_mul_ck‹fixed-factor-clockt*æñ7+=+dpll4_m3x2_ck@d00‹ti,gate-clockt+˜p û7,=,omap_54m_fck@d40‹ ti,mux-clockt,-˜p @77=7cm_96m_d2_fck‹fixed-factor-clockt)æñ7.=.omap_48m_fck@d40‹ ti,mux-clockt.-˜p @7/=/omap_12m_fck‹fixed-factor-clockt/æñ7F=Fdpll4_m4_ck@e40‹ti,divider-clocktÄ p@Ï70=0dpll4_m4x2_mul_ck‹ti,fixed-factor-clockt0,71=1dpll4_m4x2_ck@d00‹ti,gate-clockt1˜p û,7ˆ=ˆdpll4_m5_ck@f40‹ti,divider-clocktÄ?p@Ï72=2dpll4_m5x2_mul_ck‹ti,fixed-factor-clockt2,73=3dpll4_m5x2_ck@d00‹ti,gate-clockt3˜p û,7i=idpll4_m6_ck@1140‹ti,divider-clockt˜Ä?p@Ï74=4dpll4_m6x2_mul_ck‹fixed-factor-clockt4æñ75=5dpll4_m6x2_ck@d00‹ti,gate-clockt5˜p û76=6emu_per_alwon_ck‹fixed-factor-clockt6æñ7b=bclkout2_src_gate_ck@d70‹ ti,composite-no-wait-gate-clockt%˜p p78=8clkout2_src_mux_ck@d70‹ti,composite-mux-clockt%)7p p79=9clkout2_src_ck‹ti,composite-clockt897:=:sys_clkout2@d70‹ti,divider-clockt:˜Ä@p p?mpu_ck‹fixed-factor-clockt;æñ7<=<arm_fck@924‹ti,divider-clockt<p $Äemu_mpu_alwon_ck‹fixed-factor-clockt<æñ7c=cl3_ick@a40‹ti,divider-clockt%Äp @Ï7===l4_ick@a40‹ti,divider-clockt=˜Äp @Ï7>=>rm_ick@c40‹ti,divider-clockt>˜Äp @Ïgpt10_gate_fck@a00‹ti,composite-gate-clockt˜ p 7@=@gpt10_mux_fck@a40‹ti,composite-mux-clockt?˜p @7A=Agpt10_fck‹ti,composite-clockt@Agpt11_gate_fck@a00‹ti,composite-gate-clockt˜ p 7B=Bgpt11_mux_fck@a40‹ti,composite-mux-clockt?˜p @7C=Cgpt11_fck‹ti,composite-clocktBCcore_96m_fck‹fixed-factor-clocktDæñ7=mmchs2_fck@a00‹ti,wait-gate-clocktp ˜7³=³mmchs1_fck@a00‹ti,wait-gate-clocktp ˜7´=´i2c3_fck@a00‹ti,wait-gate-clocktp ˜7µ=µi2c2_fck@a00‹ti,wait-gate-clocktp ˜7¶=¶i2c1_fck@a00‹ti,wait-gate-clocktp ˜7·=·mcbsp5_gate_fck@a00‹ti,composite-gate-clockt˜ p 7=mcbsp1_gate_fck@a00‹ti,composite-gate-clockt˜ p 7=core_48m_fck‹fixed-factor-clockt/æñ7E=Emcspi4_fck@a00‹ti,wait-gate-clocktEp ˜7¸=¸mcspi3_fck@a00‹ti,wait-gate-clocktEp ˜7¹=¹mcspi2_fck@a00‹ti,wait-gate-clocktEp ˜7º=ºmcspi1_fck@a00‹ti,wait-gate-clocktEp ˜7»=»uart2_fck@a00‹ti,wait-gate-clocktEp ˜7¼=¼uart1_fck@a00‹ti,wait-gate-clocktEp ˜ 7½=½core_12m_fck‹fixed-factor-clocktFæñ7G=Ghdq_fck@a00‹ti,wait-gate-clocktGp ˜7¾=¾core_l3_ick‹fixed-factor-clockt=æñ7H=Hsdrc_ick@a10‹ti,wait-gate-clocktHp ˜7‰=‰gpmc_fck‹fixed-factor-clocktHæñcore_l4_ick‹fixed-factor-clockt>æñ7I=Immchs2_ick@a10‹ti,omap3-interface-clocktIp ˜7¿=¿mmchs1_ick@a10‹ti,omap3-interface-clocktIp ˜7À=Àhdq_ick@a10‹ti,omap3-interface-clocktIp ˜7Á=Ámcspi4_ick@a10‹ti,omap3-interface-clocktIp ˜7Â=Âmcspi3_ick@a10‹ti,omap3-interface-clocktIp ˜7Ã=Ãmcspi2_ick@a10‹ti,omap3-interface-clocktIp ˜7Ä=Ämcspi1_ick@a10‹ti,omap3-interface-clocktIp ˜7Å=Åi2c3_ick@a10‹ti,omap3-interface-clocktIp ˜7Æ=Æi2c2_ick@a10‹ti,omap3-interface-clocktIp ˜7Ç=Çi2c1_ick@a10‹ti,omap3-interface-clocktIp ˜7È=Èuart2_ick@a10‹ti,omap3-interface-clocktIp ˜7É=Éuart1_ick@a10‹ti,omap3-interface-clocktIp ˜ 7Ê=Êgpt11_ick@a10‹ti,omap3-interface-clocktIp ˜ 7Ë=Ëgpt10_ick@a10‹ti,omap3-interface-clocktIp ˜ 7Ì=Ìmcbsp5_ick@a10‹ti,omap3-interface-clocktIp ˜ 7Í=Ímcbsp1_ick@a10‹ti,omap3-interface-clocktIp ˜ 7Î=Îomapctrl_ick@a10‹ti,omap3-interface-clocktIp ˜7Ï=Ïdss_tv_fck@e00‹ti,gate-clockt7p˜7®=®dss_96m_fck@e00‹ti,gate-clocktDp˜7¯=¯dss2_alwon_fck@e00‹ti,gate-clocktp˜7°=°dummy_ck‹ fixed-clock´gpt1_gate_fck@c00‹ti,composite-gate-clockt˜p 7J=Jgpt1_mux_fck@c40‹ti,composite-mux-clockt?p @7K=Kgpt1_fck‹ti,composite-clocktJKaes2_ick@a10‹ti,omap3-interface-clocktI˜p 7Ð=Ðwkup_32k_fck‹fixed-factor-clockt?æñ7L=Lgpio1_dbck@c00‹ti,gate-clocktLp ˜7¥=¥sha12_ick@a10‹ti,omap3-interface-clocktIp ˜7Ñ=Ñwdt2_fck@c00‹ti,wait-gate-clocktLp ˜7¦=¦wdt2_ick@c10‹ti,omap3-interface-clocktMp ˜7§=§wdt1_ick@c10‹ti,omap3-interface-clocktMp ˜7¨=¨gpio1_ick@c10‹ti,omap3-interface-clocktMp ˜7©=©omap_32ksync_ick@c10‹ti,omap3-interface-clocktMp ˜7ª=ªgpt12_ick@c10‹ti,omap3-interface-clocktMp ˜7«=«gpt1_ick@c10‹ti,omap3-interface-clocktMp ˜7¬=¬per_96m_fck‹fixed-factor-clockt(æñ7 = per_48m_fck‹fixed-factor-clockt/æñ7N=Nuart3_fck@1000‹ti,wait-gate-clocktNp˜ 7‹=‹gpt2_gate_fck@1000‹ti,composite-gate-clockt˜p7O=Ogpt2_mux_fck@1040‹ti,composite-mux-clockt?p@7P=Pgpt2_fck‹ti,composite-clocktOPgpt3_gate_fck@1000‹ti,composite-gate-clockt˜p7Q=Qgpt3_mux_fck@1040‹ti,composite-mux-clockt?˜p@7R=Rgpt3_fck‹ti,composite-clocktQRgpt4_gate_fck@1000‹ti,composite-gate-clockt˜p7S=Sgpt4_mux_fck@1040‹ti,composite-mux-clockt?˜p@7T=Tgpt4_fck‹ti,composite-clocktSTgpt5_gate_fck@1000‹ti,composite-gate-clockt˜p7U=Ugpt5_mux_fck@1040‹ti,composite-mux-clockt?˜p@7V=Vgpt5_fck‹ti,composite-clocktUVgpt6_gate_fck@1000‹ti,composite-gate-clockt˜p7W=Wgpt6_mux_fck@1040‹ti,composite-mux-clockt?˜p@7X=Xgpt6_fck‹ti,composite-clocktWXgpt7_gate_fck@1000‹ti,composite-gate-clockt˜p7Y=Ygpt7_mux_fck@1040‹ti,composite-mux-clockt?˜p@7Z=Zgpt7_fck‹ti,composite-clocktYZgpt8_gate_fck@1000‹ti,composite-gate-clockt˜ p7[=[gpt8_mux_fck@1040‹ti,composite-mux-clockt?˜p@7\=\gpt8_fck‹ti,composite-clockt[\gpt9_gate_fck@1000‹ti,composite-gate-clockt˜ p7]=]gpt9_mux_fck@1040‹ti,composite-mux-clockt?˜p@7^=^gpt9_fck‹ti,composite-clockt]^per_32k_alwon_fck‹fixed-factor-clockt?æñ7_=_gpio6_dbck@1000‹ti,gate-clockt_p˜7Œ=Œgpio5_dbck@1000‹ti,gate-clockt_p˜7�=�gpio4_dbck@1000‹ti,gate-clockt_p˜7Ž=Žgpio3_dbck@1000‹ti,gate-clockt_p˜7�=�gpio2_dbck@1000‹ti,gate-clockt_p˜ 7�=�wdt3_fck@1000‹ti,wait-gate-clockt_p˜ 7‘=‘per_l4_ick‹fixed-factor-clockt>æñ7`=`gpio6_ick@1010‹ti,omap3-interface-clockt`p˜7’=’gpio5_ick@1010‹ti,omap3-interface-clockt`p˜7“=“gpio4_ick@1010‹ti,omap3-interface-clockt`p˜7”=”gpio3_ick@1010‹ti,omap3-interface-clockt`p˜7•=•gpio2_ick@1010‹ti,omap3-interface-clockt`p˜ 7–=–wdt3_ick@1010‹ti,omap3-interface-clockt`p˜ 7—=—uart3_ick@1010‹ti,omap3-interface-clockt`p˜ 7˜=˜uart4_ick@1010‹ti,omap3-interface-clockt`p˜7™=™gpt9_ick@1010‹ti,omap3-interface-clockt`p˜ 7š=šgpt8_ick@1010‹ti,omap3-interface-clockt`p˜ 7›=›gpt7_ick@1010‹ti,omap3-interface-clockt`p˜7œ=œgpt6_ick@1010‹ti,omap3-interface-clockt`p˜7�=�gpt5_ick@1010‹ti,omap3-interface-clockt`p˜7ž=žgpt4_ick@1010‹ti,omap3-interface-clockt`p˜7Ÿ=Ÿgpt3_ick@1010‹ti,omap3-interface-clockt`p˜7 = gpt2_ick@1010‹ti,omap3-interface-clockt`p˜7¡=¡mcbsp2_ick@1010‹ti,omap3-interface-clockt`p˜7¢=¢mcbsp3_ick@1010‹ti,omap3-interface-clockt`p˜7£=£mcbsp4_ick@1010‹ti,omap3-interface-clockt`p˜7¤=¤mcbsp2_gate_fck@1000‹ti,composite-gate-clockt˜p7 = mcbsp3_gate_fck@1000‹ti,composite-gate-clockt˜p7 = mcbsp4_gate_fck@1000‹ti,composite-gate-clockt˜p7=emu_src_mux_ck@1140‹ ti,mux-clocktabcp@7d=demu_src_ck‹ti,clkdm-gate-clocktd7e=epclk_fck@1140‹ti,divider-clockte˜Äp@Ïpclkx2_fck@1140‹ti,divider-clockte˜Äp@Ïatclk_fck@1140‹ti,divider-clockte˜Äp@Ïtraceclk_src_fck@1140‹ ti,mux-clocktabc˜p@7f=ftraceclk_fck@1140‹ti,divider-clocktf˜ Äp@Ïsecure_32k_fck‹ fixed-clock´€7g=ggpt12_fck‹fixed-factor-clocktgæñwdt1_fck‹fixed-factor-clocktgæñsecurity_l4_ick2‹fixed-factor-clockt>æñ7h=haes1_ick@a14‹ti,omap3-interface-clockth˜p rng_ick@a14‹ti,omap3-interface-clockthp ˜sha11_ick@a14‹ti,omap3-interface-clockthp ˜des1_ick@a14‹ti,omap3-interface-clockthp ˜cam_mclk@f00‹ti,gate-clockti˜p,cam_ick@f10‹!ti,omap3-no-wait-interface-clockt>p˜7Ø=Øcsi2_96m_fck@f00‹ti,gate-clocktp˜7Ù=Ùsecurity_l3_ick‹fixed-factor-clockt=æñ7j=jpka_ick@a14‹ti,omap3-interface-clocktjp ˜icr_ick@a10‹ti,omap3-interface-clocktIp ˜des2_ick@a10‹ti,omap3-interface-clocktIp ˜mspro_ick@a10‹ti,omap3-interface-clocktIp ˜mailboxes_ick@a10‹ti,omap3-interface-clocktIp ˜ssi_l4_ick‹fixed-factor-clockt>æñ7q=qsr1_fck@c00‹ti,wait-gate-clocktp ˜sr2_fck@c00‹ti,wait-gate-clocktp ˜sr_l4_ick‹fixed-factor-clockt>æñdpll2_fck@40‹ti,divider-clockt%˜Äp@Ï7k=kdpll2_ck@4‹ti,omap3-dpll-clocktkp$@4Ugo7l=ldpll2_m2_ck@44‹ti,divider-clocktlÄpDÏ7m=miva2_ck@0‹ti,wait-gate-clocktmp˜7Ú=Úmodem_fck@a00‹ti,omap3-interface-clocktp ˜7Û=Ûsad2d_ick@a10‹ti,omap3-interface-clockt=p ˜7Ü=Ümad2d_ick@a18‹ti,omap3-interface-clockt=p ˜7Ý=Ýmspro_fck@a00‹ti,wait-gate-clocktp ˜ssi_ssr_gate_fck_3430es2@a00‹ ti,composite-no-wait-gate-clockt˜p 7n=nssi_ssr_div_fck_3430es2@a40‹ti,composite-divider-clockt˜p @$ƒ7o=ossi_ssr_fck_3430es2‹ti,composite-clocktno7p=pssi_sst_fck_3430es2‹fixed-factor-clocktpæñ7ð=ðhsotgusb_ick_3430es2@a10‹"ti,omap3-hsotgusb-interface-clocktHp ˜7Š=Šssi_ick_3430es2@a10‹ti,omap3-ssi-interface-clocktqp ˜7ñ=ñusim_gate_fck@c00‹ti,composite-gate-clocktD˜ p 7|=|sys_d2_ck‹fixed-factor-clocktæñ7s=somap_96m_d2_fck‹fixed-factor-clocktDæñ7t=tomap_96m_d4_fck‹fixed-factor-clocktDæñ7u=uomap_96m_d8_fck‹fixed-factor-clocktDæñ7v=vomap_96m_d10_fck‹fixed-factor-clocktDæñ 7w=wdpll5_m2_d4_ck‹fixed-factor-clocktræñ7x=xdpll5_m2_d8_ck‹fixed-factor-clocktræñ7y=ydpll5_m2_d16_ck‹fixed-factor-clocktræñ7z=zdpll5_m2_d20_ck‹fixed-factor-clocktræñ7{={usim_mux_fck@c40‹ti,composite-mux-clock(tstuvwxyz{˜p @Ï7}=}usim_fck‹ti,composite-clockt|}usim_ick@c10‹ti,omap3-interface-clocktMp ˜ 7­=­dpll5_ck@d04‹ti,omap3-dpll-clocktp  $ L 4Ug7~=~dpll5_m2_ck@d50‹ti,divider-clockt~Äp PÏ7r=rsgx_gate_fck@b00‹ti,composite-gate-clockt%˜p 7†=†core_d3_ck‹fixed-factor-clockt%æñ7=core_d4_ck‹fixed-factor-clockt%æñ7€=€core_d6_ck‹fixed-factor-clockt%æñ7�=�omap_192m_alwon_fck‹fixed-factor-clockt!æñ7‚=‚core_d2_ck‹fixed-factor-clockt%æñ7ƒ=ƒsgx_mux_fck@b40‹ti,composite-mux-clock t€�)‚ƒ„…p @7‡=‡sgx_fck‹ti,composite-clockt†‡sgx_ick@b10‹ti,wait-gate-clockt=p ˜7Þ=Þcpefuse_fck@a08‹ti,gate-clocktp ˜7Ò=Òts_fck@a08‹ti,gate-clockt?p ˜7Ó=Óusbtll_fck@a08‹ti,wait-gate-clocktrp ˜7Ô=Ôusbtll_ick@a18‹ti,omap3-interface-clocktIp ˜7Õ=Õmmchs3_ick@a10‹ti,omap3-interface-clocktIp ˜7Ö=Ömmchs3_fck@a00‹ti,wait-gate-clocktp ˜7×=×dss1_alwon_fck_3430es2@e00‹ti,dss-gate-clocktˆ˜p,7±=±dss_ick_3430es2@e10‹ti,omap3-dss-interface-clockt>p˜7²=²usbhost_120m_fck@1400‹ti,gate-clocktrp˜7ß=ßusbhost_48m_fck@1400‹ti,dss-gate-clockt/p˜7à=àusbhost_ick@1410‹ti,omap3-dss-interface-clockt>p˜7á=áclockdomainscore_l3_clkdmti,clockdomaint‰Šdpll3_clkdmti,clockdomaintdpll1_clkdmti,clockdomaintper_clkdmti,clockdomainht‹Œ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤emu_clkdmti,clockdomaintedpll4_clkdmti,clockdomaintwkup_clkdmti,clockdomain$t¥¦§¨©ª«¬­dss_clkdmti,clockdomaint®¯°±²core_l4_clkdmti,clockdomain”t³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖ×cam_clkdmti,clockdomaintØÙiva2_clkdmti,clockdomaintÚdpll2_clkdmti,clockdomaintld2d_clkdmti,clockdomain tÛÜÝdpll5_clkdmti,clockdomaint~sgx_clkdmti,clockdomaintÞusbhost_clkdmti,clockdomain tßàácounter@48320000ti,omap-counter32kpH2  ±counter_32kinterrupt-controller@48200000ti,omap3-intcÓÂpH 7=dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmapH`¦ �š §`7=gpio@48310000ti,omap3-gpiopH1¦±gpio1´ÆÖÓÂgpio@49050000ti,omap3-gpiopI¦±gpio2ÆÖÓÂgpio@49052000ti,omap3-gpiopI ¦±gpio3ÆÖÓÂgpio@49054000ti,omap3-gpiopI@¦ ±gpio4ÆÖÓÂgpio@49056000ti,omap3-gpiopI`¦!±gpio5ÆÖÓÂgpio@49058000ti,omap3-gpiopI€¦"±gpio6ÆÖÓÂserial@4806a000ti,omap3-uartpH  âH¥12ªtxrx±uart1´Ülserial@4806c000ti,omap3-uartpHÀâI¥34ªtxrx±uart2´Ülserial@49020000ti,omap3-uartpIâJ¥56ªtxrx±uart3´Üli2c@48070000 ti,omap3-i2cpH€¦8¥ªtxrx+±i2c1´'¬@twl@48pH¦ ti,twl4030ÓÂödefaultâãrtcti,twl4030-rtc¦ bciti,twl4030-bci¦ äwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1[ 'Às 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthstatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinslinux,mtd-namebank-widthgpmc,mux-add-datagpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenlabelti,nand-ecc-optnand-bus-widthgpmc,device-widthmultipointnum-epsram-bitsiommusti,phy-type#thermal-sensor-cells