Ð þíHW8CŒ(ËCT2Marvell Armada XP Development Board DB-MV784MP-GPO!marvell,axp-gpmarvell,armadaxp-mv78460marvell,armadaxpmarvell,armada-370-xpchosen,serial0:115200n8aliases 8/soc/internal-regs/serial@12000 @/soc/internal-regs/serial@12100 H/soc/internal-regs/serial@12200 P/soc/internal-regs/serial@12300X/soc/internal-regs/gpio@18100^/soc/internal-regs/gpio@18140d/soc/internal-regs/gpio@18180memoryjmemory vðcpuszmarvell,armada-xp-smpcpu@0!marvell,sheeva-v7jcpuvˆ�B@cpu@1jcpu!marvell,sheeva-v7vˆ�B@cpu@2jcpu!marvell,sheeva-v7vˆ�B@cpu@3jcpu!marvell,sheeva-v7vˆ�B@pm_pic$�pmu!arm,cortex-a9-pmu¨soc¼ÇØøàêÿà!!marvell,armadaxp-mbussimple-busxûðñÿð/ð ñ ñ ñ devbus-bootcs!marvell,mvebu-devbus vðû/ÿÿÿÿˆokay ê`-Aä`UÈÀh{� ê`²ê`Ãê`nor@0 !cfi-flashvÔdevbus-cs0!marvell,mvebu-devbus vðû>ÿÿÿÿˆ disableddevbus-cs1!marvell,mvebu-devbus vðû=ÿÿÿÿˆ disableddevbus-cs2!marvell,mvebu-devbus vðû;ÿÿÿÿˆ disableddevbus-cs3!marvell,mvebu-devbus vð û7ÿÿÿÿˆ disabledinternal-regs !simple-busûðrtc@10300!marvell,orion-rtcv ß2i2c@11000(!marvell,mv78230-i2cmarvell,mv64xxx-i2cßêèˆ disabledvi2c@11100(!marvell,mv78230-i2cmarvell,mv64xxx-i2cß êèˆ disabledvserial@12000!snps,dw-apb-uartv õß)ÿˆokayserial@12100!snps,dw-apb-uartv!õß*ÿˆokaypin-ctrl@18000v€8!marvell,mv78460-pinctrlge0-gmii-pins† mpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17mpp18mpp19mpp20mpp21mpp22mpp23ge0ge0-rgmii-pins> mpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp11ge0ge1-rgmii-pinsH mpp12mpp13mpp14mpp15mpp16mpp17mpp18mpp19mpp20mpp21mpp22mpp23ge1sdio-pins$ mpp30mpp31mpp32mpp33mpp34mpp35sd0spi0-pins mpp36mpp37mpp38mpp39spi0*0spi1-pins mpp13mpp14mpp16mpp17spi1*0uart2-pins  mpp42mpp43uart2* 0 uart3-pins  mpp44mpp45uart3*0corediv-clock@18740!!marvell,armada-370-corediv-clockv‡@ 8ˆEnand* 0 mbus-controller@20000!marvell,mbus-controllerv€ P*0interrupt-controller@20a00 !marvell,mpicXi~v ÐpX*0coherency-fabric@20200!marvell,coherency-fabricv°timer@20300v0@0ß%&'(!marvell,armada-xp-timer ˆ �nbclkfixedwatchdog@20300v4!marvell,armada-xp-wdt ˆ �nbclkfixedpmsu@22000!marvell,armada-370-pmsuv usb@50000!marvell,orion-ehcivß-okayˆusb@51000!marvell,orion-ehcivß.okayˆethernet@70000v@߈okay!marvell,armada-xp-neta™ �qsgmii¦ µmdio!marvell,orion-mdiov ˆethernet-phy@0v* 0 ethernet-phy@1v* 0 ethernet-phy@2v*0ethernet-phy@3v*0ethernet@74000v@@ß ˆokay!marvell,armada-xp-neta™ �qsgmii¦ µsata@a0000!marvell,armada-370-satav Pß7ˆ�01okayÂnand@d0000!marvell,armada370-nandv Tßqˆ okayËÒëmvsdio@d4000!marvell,orion-sdiov @ß6ˆ&7 disabledsdramc@1400#!marvell,armada-xp-sdram-controllervl2-cache!marvell,aurora-system-cachev€IWcqserial@12200!snps,dw-apb-uart} ‡defaultv"õß+ÿˆokayserial@12300!snps,dw-apb-uart}‡defaultv#õß,ÿˆokaysystem-controller@18200(!marvell,armada-370-xp-system-controllerv‚clock-gating-control@18220!marvell,armada-xp-gating-clockv‚ ˆ8*0mvebu-sar@18230!marvell,armada-xp-core-clockv‚08*0thermal@182b0!marvell,armadaxp-thermalv‚°„Ðokayclock-complex@187008!marvell,armada-xp-cpu-clockv‡$ÀTˆ*0cpurst@20800!marvell,armada-370-cpu-resetv cpu-config@21000!marvell,armada-xp-cpu-configvethernet@30000!marvell,armada-xp-netav@ß ˆokay™�qsgmii¦ µusb@52000!marvell,orion-ehciv ß/ˆ disabledxor@60900!marvell,orion-xorv  ˆokayxor10ß3•£xor11ß4•£®crypto@90000!marvell,armada-xp-cryptov ¼regsß01ˆ �cesa0cesa1ÆÛbm@c0000!marvell,armada-380-neta-bmv ¬ˆ ôokay* 0 xor@f0900!marvell,orion-xorv  ˆokayxor00ß^•£xor01ß_•£®gpio@18100!marvell,orion-gpiov�@ iXßRSTU*0gpio@18140!marvell,orion-gpiov�@@ iXßWXYZgpio@18180!marvell,orion-gpiov�€@iXß[ethernet@34000!marvell,armada-xp-netav@@߈okay™�qsgmii¦ µpinctrl}‡defaultpic-pins-0 mpp16mpp17mpp18gpio*0spi@10600lvð(ÿÿÿÿ^ÿÿÿÿžÿÿÿÿÞÿÿÿÿÿÿÿÿ_ÿÿÿÿŸÿÿÿÿßÿÿÿÿ$߈okay(!marvell,armada-xp-spimarvell,orion-spi}‡defaultspi-flash@0!n25q128a13jedec,spi-norv/oóspi@10680lvð€(ÿÿÿÿZÿÿÿÿšÿÿÿÿÚÿÿÿÿÿÿÿÿ[ÿÿÿÿ›ÿÿÿÿÛÿÿÿÿ$ß\ˆ disabled(!marvell,armada-xp-spimarvell,orion-spi}‡defaultbootrom!marvell,bootrom vsa-sram0 !mmio-sram v ˆû *0sa-sram1 !mmio-sram v ˆû *0bm-bppi !mmio-sram v û ˆ Aokay*0pcie-controller!marvell,armada-xp-pcieokayjpciNYÿHû‚ð ‚ ð ‚@ð@ ‚€ð€ ‚ÀðÀ ‚ð ‚ ð ‚@ð@ ‚€ð€ ‚ÀðÀ ‚è�à‚Ø�Ђ¸�°‚x�p‚è�à‚Ø�Ђ¸�°‚x�p‚ ø� ð‚ ø� ðpcie@1,0jpcic‚ vX@û‚‚��v‰:—©ˆokaypcie@2,0jpcic‚@ vX@û‚‚��v‰;—©ˆ disabledpcie@3,0jpcic‚€ vX@û‚‚��v‰<—©ˆ disabledpcie@4,0jpcic‚ À v X@û‚‚��v‰=—©ˆ disabledpcie@5,0jpcic‚( v(X@û‚‚��v‰>—©ˆ  disabledpcie@6,0jpcic‚0@ v0X@û‚‚��v‰?—©ˆ  disabledpcie@7,0jpcic‚8€ v8X@û‚‚��v‰@—©ˆ  disabledpcie@8,0jpcic‚@À v@X@û‚‚��v‰A—©ˆ  disabledpcie@9,0jpcic‚H vHX@û‚‚ �� v‰c—©ˆokaypcie@10,0jpcic‚P vPX@û‚‚ �� v‰g—©ˆokayclocksmainpll !fixed-clock8»w5”*0oscillator !fixed-clock8»}x@*0 #address-cells#size-cellsmodelcompatiblestdout-pathserial0serial1serial2serial3gpio0gpio1gpio2device_typeregenable-methodclocksclock-latencyctrl-gpiosinterrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesstatusdevbus,bus-widthdevbus,turn-off-psdevbus,badr-skew-psdevbus,acc-first-psdevbus,acc-next-psdevbus,rd-setup-psdevbus,rd-hold-psdevbus,sync-enabledevbus,wr-high-psdevbus,wr-low-psdevbus,ale-wr-psbank-widthinterruptstimeout-msreg-shiftreg-io-widthmarvell,pinsmarvell,functionlinux,phandle#clock-cellsclock-output-names#interrupt-cellsinterrupt-controllermsi-controllerclock-namesphyphy-modebuffer-managerbm,pool-longnr-portsnum-csmarvell,nand-keep-configmarvell,nand-enable-arbiternand-on-flash-bbtcap-sdio-irqcap-sd-highspeedcap-mmc-highspeedcache-id-partcache-levelcache-unifiedwt-overridepinctrl-0pinctrl-namesdmacap,memcpydmacap,xordmacap,memsetreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizeinternal-memngpiosgpio-controller#gpio-cellscell-indexspi-max-frequencyno-memory-wcmsi-parentbus-rangeassigned-addressesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-laneclock-frequency